Abstract: Provided a semiconductor memory device. The semiconductor memory device comprises a cell structure, and a peripheral circuit structure electrically connected to the cell structure. The cell structure includes a plurality of gate electrodes stacked in a vertical direction and spaced apart from each other in the vertical direction, a channel structure penetrating the plurality of gate electrodes in the vertical direction, and a bit-line connected to the channel structure. The peripheral circuit structure includes an active area, a gate structure on the active area, the gate structure intersecting the active area, a source/drain area on at least one side of the gate structure and in the active area, an insulating spacer covering the gate structure, a conductive spacer on a sidewall of the insulating spacer and electrically connected to the source/drain area, and a contact electrically connected to the conductive spacer.

Abstract: A system on chip and method for operating a system on chip are provided. A system on chip includes a shared memory configured to store image data and a processor configured to: generate a first correction value by performing first image processing for a first pixel value of a first pixel of the image data received from the shared memory, generate a second correction value by performing second image processing, which is different from the first image processing, for the first pixel value of the image data received from the shared memory, generate a third correction value by performing third image processing, which is different from the first image processing and the second image processing, for the first pixel value of the image data received from the shared memory, and output a first pixel correction value that is changed from the first pixel value by comparing the first to third correction values with the first pixel value and selecting one of the first to third correction values.

Abstract: A power semiconductor device and a method for fabricating the same are provided. The power semiconductor device includes a source structure having a projected portion with a tip-shaped end portion on its center and formed so as to surround a predetermined region of right and left and upper portions of the projected portion. Two drain structures are formed in a predetermined region surrounded by the source structure. Extended drain structures are formed around the drain structures and the extended drain structures function as a channel with a field effect channel between sides of the projected portion of the source structure. Accordingly, since there are no drain structures on the tip of the projected portion of the source structure, although a radius of curvature of the tip of the projected portion is small, a decrease in a breakdown voltage of a device due to the small radius of curvature of the tip of the projected portion can be suppressed.

Abstract: A power semiconductor device and a method for fabricating the same are provided. The power semiconductor device includes a source structure having a projected portion with a tip-shaped end portion on its center and formed so as to surround a predetermined region of right and left and upper portions of the projected portion. Two drain structures are formed in a predetermined region surrounded by the source structure. Extended drain structures are formed around the drain structures and the extended drain structures function as a channel with a field effect channel between sides of the projected portion of the source structure. Accordingly, since there are no drain structures on the tip of the projected portion of the source structure, although a radius of curvature of the tip of the projected portion is small, a decrease in a breakdown voltage of a device due to the small radius of curvature of the tip of the projected portion can be suppressed.