Patents by Inventor Chang-Sheng Hsu
Chang-Sheng Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11345590Abstract: A semiconductor sensor, comprising a gas-sensing device and an integrated circuit is provided. The gas-sensing device includes a substrate having a sensing area and an interconnection area in the vicinity of the sensing area, an inter-metal dielectric (IMD) layer formed above the substrate in the sensing area and in the interconnection area, and an interconnect structure formed in the interconnection area; further includes a sensing electrode, a second TiO2-patterned portion, and a second Pt-patterned portion on the second TiO2-patterned portion in the sensing area. The interconnect structure includes a tungsten layer buried in the IMD layer, wherein part of a top surface of the tungsten layer is exposed by at least a via. The interconnect structure further includes a platinum layer formed in said at least the via, a TiO2 layer formed on the IMD layer, a first TiO2-patterned portion and a first Pt-patterned portion.Type: GrantFiled: November 13, 2020Date of Patent: May 31, 2022Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chih-Fan Hu, Chia-Wei Lee, Chang-Sheng Hsu, Weng-Yi Chen
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Publication number: 20210061643Abstract: A semiconductor sensor, comprising a gas-sensing device and an integrated circuit is provided. The gas-sensing device includes a substrate having a sensing area and an interconnection area in the vicinity of the sensing area, an inter-metal dielectric (IMD) layer formed above the substrate in the sensing area and in the interconnection area, and an interconnect structure formed in the interconnection area; further includes a sensing electrode, a second TiO2-patterned portion, and a second Pt-patterned portion on the second TiO2-patterned portion in the sensing area. The interconnect structure includes a tungsten layer buried in the IMD layer, wherein part of a top surface of the tungsten layer is exposed by at least a via. The interconnect structure further includes a platinum layer formed in said at least the via, a TiO2 layer formed on the IMD layer, a first TiO2-patterned portion and a first Pt-patterned portion.Type: ApplicationFiled: November 13, 2020Publication date: March 4, 2021Inventors: Chih-Fan Hu, Chia-Wei Lee, Chang-Sheng Hsu, Weng-Yi Chen
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Patent number: 10870576Abstract: A semiconductor sensor, comprising a gas-sensing device and an integrated circuit is provided. The gas-sensing device includes a substrate having a sensing area and an interconnection area in the vicinity of the sensing area, an inter-metal dielectric (IMD) layer formed above the substrate in the sensing area and in the interconnection area, and an interconnect structure formed in the interconnection area; further includes a sensing electrode, a second TiO2-patterned portion, and a second Pt-patterned portion on the second TiO2-patterned portion in the sensing area. The interconnect structure includes a tungsten layer buried in the IMD layer, wherein part of a top surface of the tungsten layer is exposed by at least a via. The interconnect structure further includes a platinum layer formed in said at least the via, a TiO2 layer formed on the IMD layer, a first TiO2-patterned portion and a first Pt-patterned portion.Type: GrantFiled: March 19, 2020Date of Patent: December 22, 2020Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chih-Fan Hu, Chia-Wei Lee, Chang-Sheng Hsu, Weng-Yi Chen
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Patent number: 10793426Abstract: A microelectromechanical system structure and a method for fabricating the same are provided. A method for fabricating a MEMS structure includes the following steps. A first substrate is provided, wherein a transistor, a first dielectric layer and an interconnection structure are formed thereon. A second substrate is provided, wherein a second dielectric layer and a thermal stability layer are formed on the second substrate. The first substrate is bonded to the second substrate, and the second substrate removed. A conductive layer is formed within the second dielectric layer and electrically connected to the interconnection structure. The thermal stability layer is located between the conductive layer and the interconnection structure. A growth temperature of a material of the thermal stability layer is higher than a growth temperature of a material of the conductive layer and a growth temperature of a material of the interconnection structure.Type: GrantFiled: August 21, 2018Date of Patent: October 6, 2020Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chang-Sheng Hsu, Chih-Fan Hu, Chia-Wei Lee, En Chan Chen, Shih-Wei Li
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Patent number: 10737932Abstract: A MEMS structure includes a substrate, a dielectric layer, a membrane, a backplate, and a blocking layer. The substrate has a through-hole. The dielectric layer is disposed on the substrate and has a cavity in communication with the through-hole. The membrane has at least one vent hole, is embedded in the dielectric layer and together with the dielectric layer defines a first chamber that communicates with the through-hole. The backplate is disposed on the dielectric layer. One end of the blocking layer is embedded in the dielectric layer, and the other end of the blocking layer extends into the cavity; the blocking layer is spatially isolated from the membrane and at least partially overlaps with the at least one vent hole.Type: GrantFiled: February 25, 2019Date of Patent: August 11, 2020Assignee: UNITED MICROELECTRONICS CORP.Inventors: Yuan-Sheng Lin, Jung-Hao Chang, Chang-Sheng Hsu, Weng-Yi Chen
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Publication number: 20200223687Abstract: A MEMS structure includes a substrate, a dielectric layer, a membrane, a backplate, and a blocking layer. The substrate has a through-hole. The dielectric layer is disposed on the substrate and has a cavity in communication with the through-hole. The membrane has at least one vent hole, is embedded in the dielectric layer and together with the dielectric layer defines a first chamber that communicates with the through-hole. The backplate is disposed on the dielectric layer. One end of the blocking layer is embedded in the dielectric layer, and the other end of the blocking layer extends into the cavity; the blocking layer is spatially isolated from the membrane and at least partially overlaps with the at least one vent hole.Type: ApplicationFiled: February 25, 2019Publication date: July 16, 2020Inventors: Yuan-Sheng LIN, Jung-Hao CHANG, Chang-Sheng HSU, Weng-Yi CHEN
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Publication number: 20200216304Abstract: A semiconductor sensor, comprising a gas-sensing device and an integrated circuit is provided. The gas-sensing device includes a substrate having a sensing area and an interconnection area in the vicinity of the sensing area, an inter-metal dielectric (IMD) layer formed above the substrate in the sensing area and in the interconnection area, and an interconnect structure formed in the interconnection area; further includes a sensing electrode, a second TiO2-patterned portion, and a second Pt-patterned portion on the second TiO2-patterned portion in the sensing area. The interconnect structure includes a tungsten layer buried in the IMD layer, wherein part of a top surface of the tungsten layer is exposed by at least a via. The interconnect structure further includes a platinum layer formed in said at least the via, a TiO2 layer formed on the IMD layer, a first TiO2-patterned portion and a first Pt-patterned portion.Type: ApplicationFiled: March 19, 2020Publication date: July 9, 2020Inventors: Chih-Fan Hu, Chia-Wei Lee, Chang-Sheng Hsu, Weng-Yi Chen
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Patent number: 10640368Abstract: A semiconductor sensor, comprising a gas-sensing device and an integrated circuit electrically connected to the gas-sensing device, is provided. The gas-sensing device includes a substrate having a sensing area and an interconnection area in the vicinity of the sensing area, an inter-metal dielectric (IMD) layer formed above the substrate in the sensing area and in the interconnection area, and an interconnect structure formed in the interconnection area. The interconnect structure includes a tungsten layer buried in the IMD layer, wherein part of a top surface of the tungsten layer is exposed by at least a via. The interconnect structure further includes a platinum layer formed in said at least the via, wherein the platinum (Pt) layer directly contacts the top surface of the tungsten layer.Type: GrantFiled: October 14, 2016Date of Patent: May 5, 2020Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chih-Fan Hu, Chia-Wei Lee, Chang-Sheng Hsu, Weng-Yi Chen
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Patent number: 10475640Abstract: Provided herein is a method for manufacturing a semiconductor device. A substrate including a MEMS region and a connection region thereon is provided; a dielectric layer disposed on the substrate in the connection region is provided; a poly-silicon layer disposed on the dielectric layer is provided, wherein the poly-silicon layer serves as an etch-stop layer; a connection pad disposed on the poly-silicon layer is provided; and a passivation layer covering the dielectric layer is provided, wherein the passivation layer includes an opening that exposes the connection pad and a transition region between the connection pad and the passivation layer, and a conductive layer conformally covering the connection pad and the poly-silicon layer in the transition region is provided.Type: GrantFiled: September 21, 2018Date of Patent: November 12, 2019Assignee: UNITED MICROELECTRONICS CORPORATIONInventors: Yan-Da Chen, Weng Yi Chen, Chang-Sheng Hsu, Kuan-Yu Wang, Yuan Sheng Lin
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Patent number: 10408780Abstract: The present invention provides a structure of a gas sensor, comprising: a support, having a front side, a back side opposite to the front side, a cell region, and a peripheral region circling the cell region; a cavity, formed on the back side of the support in the cell region; a heater, disposed on the front side of the support covering the cavity; a sensing element, disposed on the heater; and a sealing layer, formed on the back side of the support covering inside the cavity.Type: GrantFiled: April 20, 2017Date of Patent: September 10, 2019Assignee: UNITED MICROELECTRONICS CORPORATIONInventors: Chia-Wei Lee, Chang-Sheng Hsu, Chih-Fan Hu, Chin-Jen Cheng, Chang Hsin Wu
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Publication number: 20190027358Abstract: Provided herein is a method for manufacturing a semiconductor device. A substrate including a MEMS region and a connection region thereon is provided; a dielectric layer disposed on the substrate in the connection region is provided; a poly-silicon layer disposed on the dielectric layer is provided, wherein the poly-silicon layer serves as an etch-stop layer; a connection pad disposed on the poly-silicon layer is provided; and a passivation layer covering the dielectric layer is provided, wherein the passivation layer includes an opening that exposes the connection pad and a transition region between the connection pad and the passivation layer, and a conductive layer conformally covering the connection pad and the poly-silicon layer in the transition region is provided.Type: ApplicationFiled: September 21, 2018Publication date: January 24, 2019Inventors: YAN-DA CHEN, WENG YI CHEN, CHANG-SHENG HSU, KUAN-YU WANG, YUAN SHENG LIN
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Publication number: 20180354783Abstract: A microelectromechanical system structure and a method for fabricating the same are provided. A method for fabricating a MEMS structure includes the following steps. A first substrate is provided, wherein a transistor, a first dielectric layer and an interconnection structure are formed thereon. A second substrate is provided, wherein a second dielectric layer and a thermal stability layer are formed on the second substrate. The first substrate is bonded to the second substrate, and the second substrate removed. A conductive layer is formed within the second dielectric layer and electrically connected to the interconnection structure. The thermal stability layer is located between the conductive layer and the interconnection structure. A growth temperature of a material of the thermal stability layer is higher than a growth temperature of a material of the conductive layer and a growth temperature of a material of the interconnection structure.Type: ApplicationFiled: August 21, 2018Publication date: December 13, 2018Applicant: United Microelectronics Corp.Inventors: Chang-Sheng Hsu, Chih-Fan Hu, Chia-Wei Lee, En Chan Chen, Shih-Wei Li
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Patent number: 10115582Abstract: Provided herein is a semiconductor device is provided. The semiconductor device includes a substrate including a MEMS region and a connection region thereon; a dielectric layer disposed on the substrate in the connection region; a poly-silicon layer disposed on the dielectric layer, wherein the poly-silicon layer serves as an etch-stop layer; a connection pad disposed on the poly-silicon layer; and a passivation layer covering the dielectric layer, wherein the passivation layer includes an opening that exposes the connection pad and a transition region between the connection pad and the passivation layer.Type: GrantFiled: June 5, 2015Date of Patent: October 30, 2018Assignee: UNITED MICROELECTRONICS CORPORATIONInventors: Yan-Da Chen, Weng Yi Chen, Chang-Sheng Hsu, Kuan-Yu Wang, Yuan Sheng Lin
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Publication number: 20180306738Abstract: The present invention provides a structure of a gas sensor, comprising: a support, having a front side, a back side opposite to the front side, a cell region, and a peripheral region circling the cell region; a cavity, formed on the back side of the support in the cell region; a heater, disposed on the front side of the support covering the cavity; a sensing element, disposed on the heater; and a sealing layer, formed on the back side of the support covering inside the cavity.Type: ApplicationFiled: April 20, 2017Publication date: October 25, 2018Inventors: Chia-Wei LEE, Chang-Sheng HSU, Chih-Fan HU, Chin-Jen CHENG, Chang Hsin WU
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Patent number: 10087072Abstract: A microelectromechanical system structure and a method for fabricating the same are provided. A method for fabricating a MEMS structure includes the following steps. A first substrate is provided, wherein a transistor, a first dielectric layer and an interconnection structure are formed thereon. A second substrate is provided, wherein a second dielectric layer and a thermal stability layer are formed on the second substrate. The first substrate is bonded to the second substrate, and the second substrate removed. A conductive layer is formed within the second dielectric layer and electrically connected to the interconnection structure. The thermal stability layer is located between the conductive layer and the interconnection structure. A growth temperature of a material of the thermal stability layer is higher than a growth temperature of a material of the conductive layer and a growth temperature of a material of the interconnection structure.Type: GrantFiled: May 4, 2016Date of Patent: October 2, 2018Assignee: United Microelectronics Corp.Inventors: Chang-Sheng Hsu, Chih-Fan Hu, Chia-Wei Lee, En Chan Chen, Shih-Wei Li
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Patent number: 9961450Abstract: A piezoresistive microphone includes a substrate, an insulating layer, and a polysilicon layer. A first pattern is disposed within the polysilicon layer. The first pattern includes numerous first opening. A second pattern is disposed within the polysilicon layer. The second pattern includes numerous second openings. The first pattern surrounds the second pattern. Each first opening and each second opening are staggered. A first resistor is disposed in the polysilicon and between the first pattern and the second pattern. The first resistor is composed of numerous first heavily doped regions and numerous first lightly doped regions. The first heavily doped regions and the first lightly doped regions are disposed in series. The first heavily doped region and the first lightly doped region are disposed alternately. A cavity is disposed in the insulating layer and the substrate.Type: GrantFiled: August 25, 2016Date of Patent: May 1, 2018Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chang-Sheng Hsu, Weng-Yi Chen, En-Chan Chen, Shih-Wei Li, Guo-Chih Wei
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Publication number: 20180057354Abstract: A semiconductor sensor, comprising a gas-sensing device and an integrated circuit electrically connected to the gas-sensing device, is provided. The gas-sensing device includes a substrate having a sensing area and an interconnection area in the vicinity of the sensing area, an inter-metal dielectric (IMD) layer formed above the substrate in the sensing area and in the interconnection area, and an interconnect structure formed in the interconnection area. The interconnect structure includes a tungsten layer buried in the IMD layer, wherein part of a top surface of the tungsten layer is exposed by at least a via. The interconnect structure further includes a platinum layer formed in said at least the via, wherein the platinum (Pt) layer directly contacts the top surface of the tungsten layer.Type: ApplicationFiled: October 14, 2016Publication date: March 1, 2018Inventors: Chih-Fan Hu, Chia-Wei Lee, Chang-Sheng Hsu, Weng-Yi Chen
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Patent number: 9905711Abstract: An avalanche photodetector device includes a substrate having a front side and a back side, an avalanche photo detector structure disposed on the front side of the substrate, a plurality of heat sinks disposed on the back side of the substrate, and a plurality of reflecting islands disposed on the back side of the substrate.Type: GrantFiled: April 15, 2016Date of Patent: February 27, 2018Assignee: UNITED MICROELECTRONICS CORP.Inventors: Tzung-Han Tan, Chang-Sheng Hsu, Meng-Jia Lin, Te-Huang Chiu
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Publication number: 20180027337Abstract: A piezoresistive microphone includes a substrate, an insulating layer, and a polysilicon layer. A first pattern is disposed within the polysilicon layer. The first pattern includes numerous first opening. A second pattern is disposed within the polysilicon layer. The second pattern includes numerous second openings. The first pattern surrounds the second pattern. Each first opening and each second opening are staggered. A first resistor is disposed in the polysilicon and between the first pattern and the second pattern. The first resistor is composed of numerous first heavily doped regions and numerous first lightly doped regions. The first heavily doped regions and the first lightly doped regions are disposed in series. The first heavily doped region and the first lightly doped region are disposed alternately. A cavity is disposed in the insulating layer and the substrate.Type: ApplicationFiled: August 25, 2016Publication date: January 25, 2018Inventors: Chang-Sheng Hsu, Weng-Yi Chen, En-Chan Chen, Shih-Wei Li, Guo-Chih Wei
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Publication number: 20170320727Abstract: A microelectromechanical system structure and a method for fabricating the same are provided. A method for fabricating a MEMS structure includes the following steps. A first substrate is provided, wherein a transistor, a first dielectric layer and an interconnection structure are formed thereon. A second substrate is provided, wherein a second dielectric layer and a thermal stability layer are formed on the second substrate. The first substrate is bonded to the second substrate, and the second substrate removed. A conductive layer is formed within the second dielectric layer and electrically connected to the interconnection structure. The thermal stability layer is located between the conductive layer and the interconnection structure. A growth temperature of a material of the thermal stability layer is higher than a growth temperature of a material of the conductive layer and a growth temperature of a material of the interconnection structure.Type: ApplicationFiled: May 4, 2016Publication date: November 9, 2017Inventors: Chang-Sheng Hsu, Chih-Fan Hu, Chia-Wei Lee, En Chan Chen, Shih-Wei Li