Patents by Inventor CHANG-SHIUAN YANG

CHANG-SHIUAN YANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10122691
    Abstract: The present disclosure provides a receiving apparatus for preprocessing at least one segment data packet to a data packet. The receiving apparatus includes a packet parser, a data memory, a decrypt engine, a transmission engine, a header processing unit and a controller. The packet parser fetches segment-packet-header information from a segment packet header of each segment data packet. The decrypt engine decrypts an encrypted data of each segment data packet to obtain a segment payload and a QUIC private header including sequence information. The transmission engine transmits the segment payload to a specific location of a system memory. The header processing unit calculates packet information and updates the segment packet header stored in the data memory to generate a packet header. The controller controls the transmission engine based on the sequence information to output the packet header to the system memory for generating the data packet.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: November 6, 2018
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Chia-Hung Lin, Chang-Shiuan Yang, Yi-Huei Lei, Chun-Hao Lin
  • Patent number: 9954982
    Abstract: A transmission apparatus for preprocessing a data packet stored in a system memory to generate at least one segment data packet is provided. The transmission apparatus includes a transmission engine and a data memory. The transmission engine includes a header buffer, a segment controller and an encrypt engine. The header buffer stores an IP header, a UDP header, a QUIC public header and a QUIC private header of the data packet. The segment controller divides a payload of the data packet into at least one segment payload. The encrypt engine encrypts the QUIC private header and the at least one segment payload into at least one encrypted data. The data memory receives the IP header, UDP header, QUIC public header and at least one encrypted data. The IP header, UDP header, QUIC public header and at least one encrypted data are combined into at least one segment data packet.
    Type: Grant
    Filed: May 13, 2016
    Date of Patent: April 24, 2018
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Chia-Hung Lin, Chang-Shiuan Yang, Yi-Huei Lei, Chun-Hao Lin
  • Publication number: 20170180329
    Abstract: The present disclosure provides a receiving apparatus for preprocessing at least one segment data packet to a data packet. The receiving apparatus includes a packet parser, a data memory, a decrypt engine, a transmission engine, a header processing unit and a controller. The packet parser fetches segment-packet-header information from a segment packet header of each segment data packet. The decrypt engine decrypts an encrypted data of each segment data packet to obtain a segment payload and a QUIC private header including sequence information. The transmission engine transmits the segment payload to a specific location of a system memory. The header processing unit calculates packet information and updates the segment packet header stored in the data memory to generate a packet header. The controller controls the transmission engine based on the sequence information to output the packet header to the system memory for generating the data packet.
    Type: Application
    Filed: July 6, 2016
    Publication date: June 22, 2017
    Inventors: CHIA-HUNG LIN, CHANG-SHIUAN YANG, YI-HUEI LEI, CHUN-HAO LIN
  • Publication number: 20170118314
    Abstract: A transmission apparatus for preprocessing a data packet stored in a system memory to generate at least one segment data packet is provided. The transmission apparatus includes a transmission engine and a data memory. The transmission engine includes a header buffer, a segment controller and an encrypt engine. The header buffer stores an IP header, a UDP header, a QUIC public header and a QUIC private header of the data packet. The segment controller divides a payload of the data packet into at least one segment payload. The encrypt engine encrypts the QUIC private header and the at least one segment payload into at least one encrypted data. The data memory receives the IP header, UDP header, QUIC public header and at least one encrypted data. The IP header, UDP header, QUIC public header and at least one encrypted data are combined into at least one segment data packet.
    Type: Application
    Filed: May 13, 2016
    Publication date: April 27, 2017
    Inventors: CHIA-HUNG LIN, CHANG-SHIUAN YANG, YI-HUEI LEI, CHUN-HAO LIN