Abstract: An integrated input-output device for a data communication terminal equipment including a plurality of photoelectric converting circuits respectively arranged in n aligned blocks each including m aligned photoelectric converting elements, a plurality of first switching circuits respectively arranged in n aligned blocks each including m aligned thin film transistors respectively connected to the photoelectric converting elements of each corresponding one of the photoelectric converting circuits, a plurality of recording circuits respectively arranged in n aligned blocks each including m aligned recording elements, a plurality of second switching circuits respectively arranged in n aligned blocks each including m aligned thin film transistors respectively connected to the recording elements of each corresponding one of the recording circuits, n gate address lines respectively connected in common to gate electrodes of all thin film transistors of the same block-numbered first and second switching circuits, and m

Abstract: A photodiode capable of obtaining a sufficient photo current/dark ratio at both a forward bias state and a reverse bias state. The photodiode includes a glass substrate, an aluminum film formed as a lower electrode over the glass substrate, an alumina film formed as a Schottky barrier over the aluminum film, a hydrogenated amorphous silicon film formed as a photo conduction layer over a portion of the alumina film, and a transparent conduction film formed as an upper electrode over the hydrogenated amorphous silicon film.

Abstract: A contact image sensor having an arrangement capable of reducing the number of data lines passing adjacent photoelectric converters, thereby achieving a high resonance and an easy design. The contact image sensor includes a photoelectric conversion unit including m aligned blocks each having n aligned photoelectric converters, a switching unit including m aligned blocks each having n aligned thin film transistors classified into n/2.sup.k groups each having 2.sup.k thin film transistors and connected to respective photoelectric converters of each corresponding block of photoelectric conversion unit, 2.sup.k m gate lines classified into groups each having 2.sup.k gate lines respectively connected in common to gate electrodes of the same numbered thin film transistors of the thin film transistor groups of each corresponding block of the switching unit, n/2.sup.

Abstract: A method for fabricating a vertical thin film transistor capable of improving a current driving capability. The method includes the steps of sequentially forming a source electrode and a high concentration n type doped, first semiconductor layer over a substrate, selectively removing the source electrode and the first semiconductor layer at their portions at which a gate electrode is to be formed, sequentially depositing an insulating film and a metal layer for the gate electrode over the entire exposed surface of the resulting structure and then selectively removing the insulating film and the metal layer to form the gale electrode, anodizing an exposed surface of the gate electrode to form a gate insulating film, depositing an intrinsic, second semiconductor layer over the entire exposed surface of the resulting structure and depositing a high concentration n type doped, third semiconductor layer over the second semiconductor layer, and forming a drain electrode over the third semiconductor layer.

Abstract: A method of making a thin film transistor exhibiting a high channel conductance includes the steps of forming, on an insulating transparent substrate, a gate electrode, an insulating layer, a semiconductor layer, a photoresist, in this order and performing a back substrate exposure at the insulating transparent substrate using the gate electrode as a photo mask, to form a photoresist pattern. The photoresist pattern is then baked to make it flow outward to a desired bottom width. The semiconductor layer is etched using the photoresist pattern as an etch mask to form a semiconductor layer pattern. On the resultant entire exposed surface are formed an ohm contact layer and a metal layer. The metal layer is then subjected to photoing and etching processes, to remove its portion disposed above the semiconductor pattern and its opposite side edge portions, thereby forming a metal layer pattern for source and drain electrodes.