Abstract: A circuit includes a voltage divider circuit configured to generate a feedback voltage according to an output voltage, an operational amplifier configured to output a driving signal according to the feedback voltage and a reference voltage and a pass gate circuit including multiple current paths. The current paths are controlled by the driving signal and connected in parallel between the voltage divider circuit and a power reference node.

Abstract: Various embodiments of the teachings herein include an image processing system comprising: a video stream processing device configured to receive a video stream, segment the video stream into multiple frames of pictures arranged in chronological order, and distribute the multiple frames of pictures to edge computing devices in a connected edge computing device group; and a picture collecting device configured to receive pictures from the edge computing device group. The individual edge computing devices in the edge computing device group are each configured to subject the received pictures to target identification, and send the pictures marked with a region in which an identified target is located. The picture collecting device is further configured to restore in chronological order as a video stream the received pictures marked with target identification results.

Abstract: An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.

Abstract: A light source assembly includes a first annular reflector, a second annular reflector and a plurality of first light source modules. The first annular reflector has a first reflective surface. The second annular reflector is coaxial with the first annular reflector. A radius of the first annular reflector is greater than that of the second annular reflector. The second annular reflector has a second reflective surface facing the first reflective surface. The first light source modules take a central axis of the first annular reflector as a center and annularly arranged around the center. The first light source modules provide first beams to the first reflective surface, which reflects the first beams to the second reflective surface. The second reflective surface reflects the first beams and makes the first beams emit along a direction parallel to a central axis of the second annular reflector. A projection device is also provided.

Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.

Abstract: An image sensor is provided. The image sensor includes a substrate having a first pixel region and a second pixel region. The image sensor also includes a resonator structure disposed over the substrate. The resonator structure includes a first metal layer over the first pixel region and the second pixel region. The resonator structure also includes a first insulating layer over the first metal layer and the first pixel region. The first insulating layer has a first thickness. The resonator structure further includes a second insulating layer over the first metal layer and the second pixel region. The second insulating layer has a second thickness that is greater than the first thickness. In addition, the resonator structure includes a second metal layer over the first insulating layer and the second insulating layer.

Abstract: A user interface for designing, configuring and/or editing a control flow representing a control strategy associated with a semiconductor manufacturing process, the user interface including: a library of control elements having at least a control element representing a task of simulation and each control element being selectable by a user; a control flow editor configured to organize the control elements into a control flow representing the control strategy; and a communication interface for communicating the control flow to a calculation engine configured to evaluate the control flow.

Abstract: A method for determining a correction to a patterning process. The method includes obtaining a plurality of qualities of the patterning process (e.g., a plurality of parameter maps, or one or more corrections) derived from metrology data and data of an apparatus used in the patterning process, selecting, by a hardware computer system, a representative quality from the plurality of qualities, and determining, by the hardware computer system, a correction to the patterning process based on the representative quality.

Abstract: A method for determining a correction to a patterning process. The method includes obtaining a plurality of qualities of the patterning process (e.g., a plurality of parameter maps, or one or more corrections) derived from metrology data and data of an apparatus used in the patterning process, selecting, by a hardware computer system, a representative quality from the plurality of qualities, and determining, by the hardware computer system, a correction to the patterning process based on the representative quality.

Abstract: A coating apparatus includes a process chamber, a rotation device, and a rotation holder. The rotation device is disposed in the process chamber. The rotation holder is connected to the rotation device. The rotation holder includes two extension elements, two retaining elements, and two pins. The two extension elements are disposed around a center axis and separated from each other, wherein each of the two extension elements has a side surface. Each of the two retaining elements has a bottom surface, one of the two retaining elements is connected to one of the side surfaces, and the other of the two retaining elements is connected to the other of the side surfaces. One of the two pins is connected to one of the bottom surfaces, and the other of the two pins is connected to the other of the bottom surfaces.

Abstract: A method for fabricating an optical element is provided. The fabrication method includes the following steps. A substrate is provided. A plurality of first dielectric layers, a plurality of metal layers of Ag or its alloy and a plurality of second dielectric layers are formed over the substrate. The plurality of first dielectric layers and the plurality of metal layers are alternately formed over the substrate. The plurality of second dielectric layers are formed on one side away from the substrate of the plurality of metal layers and located between the plurality of metal layers and the plurality of first dielectric layers. An optical element fabricated by the method is also provided.

Abstract: A user interface for designing, configuring and/or editing a control flow representing a control strategy associated with a semiconductor manufacturing process, the user interface including: a library of control elements having at least a control element representing a task of simulation and each control element being selectable by a user; a control flow editor configured to organize the control elements into a control flow representing the control strategy; and a communication interface for communicating the control flow to a calculation engine configured to evaluate the control flow.

Abstract: A method for determining a correction to a patterning process. The method includes obtaining a plurality of qualities of the patterning process (e.g., a plurality of parameter maps, or one or more corrections) derived from metrology data and data of an apparatus used in the patterning process, selecting, by a hardware computer system, a representative quality from the plurality of qualities, and determining, by the hardware computer system, a correction to the patterning process based on the representative quality.

Abstract: A coating apparatus includes a process chamber, a rotation device, and a rotation holder. The rotation device is disposed in the process chamber. The rotation holder is connected to the rotation device. The rotation holder includes two extension elements, two retaining elements, and two pins. The two extension elements are disposed around a center axis and separated from each other, wherein each of the two extension elements has a side surface. Each of the two retaining elements has a bottom surface, one of the two retaining elements is connected to one of the side surfaces, and the other of the two retaining elements is connected to the other of the side surfaces. One of the two pins is connected to one of the bottom surfaces, and the other of the two pins is connected to the other of the bottom surfaces.

Abstract: A method for fabricating an optical element is provided. The fabrication method includes the following steps. A substrate is provided. A plurality of first dielectric layers, a plurality of metal layers of Ag or its alloy and a plurality of second dielectric layers are formed over the substrate. The plurality of first dielectric layers and the plurality of metal layers are alternately formed over the substrate. The plurality of second dielectric layers are formed on one side away from the substrate of the plurality of metal layers and located between the plurality of metal layers and the plurality of first dielectric layers. An optical element fabricated by the method is also provided.

Abstract: A wafer shipping box includes a case and a positioning unit. The case includes a base, a cover, and a receiving space defined by the base and the cover. The positioning unit is disposed in the receiving space and includes a lower retaining member connected to the base, an upper retaining member connected to the cover, and a cassette disposed therebetween. The cassette includes two upright holding walls spaced apart from each other, each of which has a plurality of lateral confining slots aligned in a front-rear direction. The lower retaining member is formed with a plurality of lower confining slots, each of which is defined by two slot walls interconnected at bottom ends thereof to form a slot bottom. The slot bottoms are respectively misaligned from central positions of the lateral confining slots along the front-rear direction.

Abstract: An image sensor is provided. The image sensor includes a substrate having a first pixel region and a second pixel region. The image sensor also includes a resonator structure disposed over the substrate. The resonator structure includes a first metal layer over the first pixel region and the second pixel region. The resonator structure also includes a first insulating layer over the first metal layer and the first pixel region. The first insulating layer has a first thickness. The resonator structure further includes a second insulating layer over the first metal layer and the second pixel region. The second insulating layer has a second thickness that is greater than the first thickness. In addition, the resonator structure includes a second metal layer over the first insulating layer and the second insulating layer.

Abstract: A wafer shipping box includes a case and a positioning unit. The case includes a base, a cover, and a receiving space defined by the base and the cover. The positioning unit is disposed in the receiving space and includes a lower retaining member connected to the base, an upper retaining member connected to the cover, and a cassette disposed therebetween. The cassette includes two upright holding walls spaced apart from each other, each of which has a plurality of lateral confining slots aligned in a front-rear direction. The lower retaining member is formed with a plurality of lower confining slots, each of which is defined by two slot walls interconnected at bottom ends thereof to form a slot bottom. The slot bottoms are respectively misaligned from central positions of the lateral confining slots along the front-rear direction.

Abstract: An image-sensing apparatus is provided. The image-sensing apparatus includes: an optical filter array including a two-band passing filter and an infrared filter; an RGB pixel array placed below the two-band passing filter; and a TOF pixel array adjacent to the RGB pixel array and placed below the two-band passing filter and the infrared filter, wherein a combination of the two-band passing filter and the infrared passing filter permits only the incident light in the infrared region to pass to the ToF pixel array.

Abstract: An image sensor for light field devices includes a plurality of sub-microlenses, a space layer, and a plurality of main microlenses. The space layer is disposed on the sub-microlenses, and the main microlenses are disposed on the space layer. The diameter of each of the main microlenses exceeds that of each of the sub-microlenses.