Patents by Inventor Chang-Xiang HUNG

Chang-Xiang HUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200373420
    Abstract: A semiconductor structure includes a substrate, a gate electrode, a first dielectric layer, a gate metal layer, a source structure, and a drain structure. The first dielectric layer has a first opening exposing the gate electrode and a second opening, and the depth of the second opening is greater than the depth of the first opening. The gate metal layer conformally covers the top surface of the first dielectric layer, the first opening, and the second opening to serve as a gate field plate. A first portion of the gate metal layer at the bottom of the first opening is higher than a second portion of the gate metal layer at the bottom of the second opening. The source structure and the drain structure are disposed at opposite sides of the gate structure, wherein the second opening is disposed between the gate electrode and the drain structure.
    Type: Application
    Filed: May 20, 2019
    Publication date: November 26, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Yu-Chieh CHOU, Hsin-Chih LIN, Chang-Xiang HUNG
  • Publication number: 20200365718
    Abstract: A semiconductor device includes a compound semiconductor layer disposed over a substrate, a protection layer disposed over the compound semiconductor layer, and a source electrode, a drain electrode and a gate electrode which penetrate through the protection layer and are disposed on the compound semiconductor layer. The semiconductor device also includes a gate field plate connecting the gate electrode and disposed over a portion of the protection layer between the gate electrode and the drain electrode. The gate field plate has an extension portion extending into the protection layer.
    Type: Application
    Filed: May 16, 2019
    Publication date: November 19, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chia-Hao LEE, Chang-Xiang HUNG, Manoj KUMAR, Chih-Cherng LIAO
  • Publication number: 20200335616
    Abstract: A semiconductor device is provided. The semiconductor device includes a channel layer disposed on a substrate, a barrier layer disposed on the channel layer, and a nitride layer disposed on the barrier layer. The semiconductor device also includes a compound semiconductor layer that includes an upper portion and a lower portion, wherein the lower portion penetrates through the nitride layer and a portion of the barrier layer. The semiconductor device also includes a spacer layer conformally disposed on a portion of the barrier layer and extending onto the nitride layer. The semiconductor device further includes a gate electrode disposed on the compound semiconductor layer, and a pair of source/drain electrodes disposed on opposite sides of the gate electrode. The pair of source/drain electrodes extends through the spacer layer, the nitride layer, and at least a portion of the barrier layer.
    Type: Application
    Filed: April 17, 2019
    Publication date: October 22, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chih-Yen Chen, Chang-Xiang Hung
  • Patent number: 10700190
    Abstract: A semiconductor device includes a first gallium nitride layer disposed on a semiconductor substrate, and an aluminum gallium nitride layer disposed on the first gallium nitride layer. The semiconductor device also includes an upper recess and a lower recess disposed in the aluminum gallium nitride layer, wherein the upper recess adjoins the lower recess, and the upper recess has a width that is greater than that of the lower recess. The semiconductor device further includes a second gallium nitride layer disposed in the first recess and the second recess, and a gate structure disposed on the second gallium nitride layer. In addition, the semiconductor device includes a source electrode and a drain electrode disposed on the aluminum gallium nitride layer.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: June 30, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chia-Hao Lee, Manoj Kumar, Chang-Xiang Hung, Chih-Cherng Liao
  • Patent number: 10573734
    Abstract: A HEMT includes a buffer layer disposed on the substrate. A barrier layer is disposed on the buffer layer. A channel layer is disposed in the buffer layer adjacent to an interface of the buffer layer and the barrier layer. A band adjustment layer is disposed on the barrier layer, including a first band adjustment layer, a second band adjustment layer, and a third band adjustment layer from top to bottom. A passivation layer is disposed on the barrier layer adjoining the band adjustment layer. A gate electrode is disposed on the band adjustment layer. Source/drain electrodes are disposed on opposite sides of the gate electrode on the barrier layer through the passivation layer. The first band adjustment layer, the second band adjustment layer, and the third band adjustment layer include N-type doped, undoped, and P-type doped III-V or II-VI semiconductors, respectively.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: February 25, 2020
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Yu-Chieh Chou, Hsin-Chih Lin, Chang-Xiang Hung
  • Publication number: 20190280092
    Abstract: A semiconductor device includes a compound semiconductor layer disposed on a substrate, a protection layer disposed on the compound semiconductor layer, and a source electrode, a drain electrode and a gate electrode penetrating the protection layer and on the compound semiconductor layer, wherein the gate electrode is disposed between the source electrode and the drain electrode. The semiconductor device also includes a plurality of field plates disposed over the protection layer and between the gate electrode and the drain electrode, wherein the plurality of field plates are separated from each other. A method for fabricating the semiconductor device is also provided.
    Type: Application
    Filed: March 12, 2018
    Publication date: September 12, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Chih LIN, Chang-Xiang HUNG, Chia-Ching HUANG, Yung-Hao LIN, Chia-Hao LEE
  • Publication number: 20190229209
    Abstract: A semiconductor device includes a first gallium nitride layer disposed on a semiconductor substrate, and an aluminum gallium nitride layer disposed on the first gallium nitride layer. The semiconductor device also includes an upper recess and a lower recess disposed in the aluminum gallium nitride layer, wherein the upper recess adjoins the lower recess, and the upper recess has a width that is greater than that of the lower recess. The semiconductor device further includes a second gallium nitride layer disposed in the first recess and the second recess, and a gate structure disposed on the second gallium nitride layer. In addition, the semiconductor device includes a source electrode and a drain electrode disposed on the aluminum gallium nitride layer.
    Type: Application
    Filed: January 23, 2018
    Publication date: July 25, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chia-Hao LEE, Manoj KUMAR, Chang-Xiang HUNG, Chih-Cherng LIAO