Abstract: A semiconductor device includes a compound semiconductor layer disposed on a substrate, a protection layer disposed on the compound semiconductor layer, and a source electrode, a drain electrode and a gate electrode penetrating the protection layer and on the compound semiconductor layer, wherein the gate electrode is disposed between the source electrode and the drain electrode. The semiconductor device also includes a plurality of field plates disposed over the protection layer and between the gate electrode and the drain electrode, wherein the plurality of field plates are separated from each other.

Abstract: A semiconductor device is provided. The semiconductor device includes a channel layer disposed over a substrate, a barrier layer disposed over the channel layer, a compound semiconductor layer disposed over the barrier layer, a gate electrode disposed over the compound semiconductor layer, and a source electrode and a drain electrode disposed on opposite sides of the gate electrode. The source electrode and the drain electrode penetrate through at least a portion of the barrier layer. The semiconductor device also includes a source field plate connected to the source electrode through a source contact. The semiconductor device further includes a first electric field redistribution pattern disposed on the barrier layer and directly under the edge of the source field plate.

Abstract: A semiconductor device is provided. The semiconductor device includes a channel layer disposed on a substrate, a barrier layer disposed on the channel layer, and a nitride layer disposed on the barrier layer. The semiconductor device also includes a compound semiconductor layer that includes an upper portion and a lower portion, wherein the lower portion penetrates through the nitride layer and a portion of the barrier layer. The semiconductor device also includes a spacer layer conformally disposed on a portion of the barrier layer and extending onto the nitride layer. The semiconductor device further includes a gate electrode disposed on the compound semiconductor layer, and a pair of source/drain electrodes disposed on opposite sides of the gate electrode. The pair of source/drain electrodes extends through the spacer layer, the nitride layer, and at least a portion of the barrier layer.

Abstract: A semiconductor device includes a compound semiconductor layer disposed over a substrate, a protection layer disposed over the compound semiconductor layer, and a source electrode, a drain electrode and a gate electrode which penetrate through the protection layer and are disposed on the compound semiconductor layer. The semiconductor device also includes a gate field plate connecting the gate electrode and disposed over a portion of the protection layer between the gate electrode and the drain electrode. The gate field plate has an extension portion extending into the protection layer.

Abstract: A semiconductor structure is provided. The semiconductor structure includes: a substrate; a source structure and a drain structure disposed on the substrate; a gate structure disposed on the substrate and between the source structure and the drain structure; a first field plate disposed on the substrate; a first oxide layer disposed between the substrate and the first field plate; a second field plate disposed on the first field plate, wherein the second field plate is closer to the drain structure than the first field plate; a planarized second oxide layer disposed between the first oxide layer and the second field plate; and a third field plate disposed on the second field plate, wherein the third field plate is closer to the drain structure than the second field plate.

Abstract: A semiconductor device includes a compound semiconductor layer disposed on a substrate, a protection layer disposed on the compound semiconductor layer, and a source electrode, a drain electrode and a gate electrode penetrating the protection layer and on the compound semiconductor layer, wherein the gate electrode is disposed between the source electrode and the drain electrode. The semiconductor device also includes a plurality of field plates disposed over the protection layer and between the gate electrode and the drain electrode, wherein the plurality of field plates are separated from each other.

Abstract: A semiconductor device includes a compound semiconductor layer disposed on a substrate, a protection layer disposed on the compound semiconductor layer, and a source electrode, a drain electrode and a gate electrode penetrating the protection layer and on the compound semiconductor layer, wherein the gate electrode is disposed between the source electrode and the drain electrode. The semiconductor device also includes a plurality of field plates disposed over the protection layer and between the gate electrode and the drain electrode, wherein the plurality of field plates are separated from each other. A method for fabricating the semiconductor device is also provided.

Abstract: A semiconductor structure includes a substrate, a gate electrode, a first dielectric layer, a gate metal layer, a source structure, and a drain structure. The first dielectric layer has a first opening exposing the gate electrode and a second opening, and the depth of the second opening is greater than the depth of the first opening. The gate metal layer conformally covers the top surface of the first dielectric layer, the first opening, and the second opening to serve as a gate field plate. A first portion of the gate metal layer at the bottom of the first opening is higher than a second portion of the gate metal layer at the bottom of the second opening. The source structure and the drain structure are disposed at opposite sides of the gate structure, wherein the second opening is disposed between the gate electrode and the drain structure.

Abstract: A semiconductor structure is provided. The semiconductor structure includes: a substrate; a source structure and a drain structure disposed on the substrate; a gate structure disposed on the substrate and between the source structure and the drain structure; a first field plate disposed on the substrate; a first oxide layer disposed between the substrate and the first field plate; a second field plate disposed on the first field plate, wherein the second field plate is closer to the drain structure than the first field plate; a planarized second oxide layer disposed between the first oxide layer and the second field plate; and a third field plate disposed on the second field plate, wherein the third field plate is closer to the drain structure than the second field plate.

Abstract: A semiconductor device is provided. The semiconductor device includes a channel layer disposed over a substrate, a barrier layer disposed over the channel layer, a compound semiconductor layer disposed over the barrier layer, a gate electrode disposed over the compound semiconductor layer, and a source electrode and a drain electrode disposed on opposite sides of the gate electrode. The source electrode and the drain electrode penetrate through at least a portion of the barrier layer. The semiconductor device also includes a source field plate connected to the source electrode through a source contact. The semiconductor device further includes a first electric field redistribution pattern disposed on the barrier layer and directly under the edge of the source field plate.

Abstract: A semiconductor structure includes a substrate, a gate electrode, a first dielectric layer, a gate metal layer, a source structure, and a drain structure. The first dielectric layer has a first opening exposing the gate electrode and a second opening, and the depth of the second opening is greater than the depth of the first opening. The gate metal layer conformally covers the top surface of the first dielectric layer, the first opening, and the second opening to serve as a gate field plate. A first portion of the gate metal layer at the bottom of the first opening is higher than a second portion of the gate metal layer at the bottom of the second opening. The source structure and the drain structure are disposed at opposite sides of the gate structure, wherein the second opening is disposed between the gate electrode and the drain structure.

Abstract: A semiconductor device includes a compound semiconductor layer disposed over a substrate, a protection layer disposed over the compound semiconductor layer, and a source electrode, a drain electrode and a gate electrode which penetrate through the protection layer and are disposed on the compound semiconductor layer. The semiconductor device also includes a gate field plate connecting the gate electrode and disposed over a portion of the protection layer between the gate electrode and the drain electrode. The gate field plate has an extension portion extending into the protection layer.

Abstract: A semiconductor device is provided. The semiconductor device includes a channel layer disposed on a substrate, a barrier layer disposed on the channel layer, and a nitride layer disposed on the barrier layer. The semiconductor device also includes a compound semiconductor layer that includes an upper portion and a lower portion, wherein the lower portion penetrates through the nitride layer and a portion of the barrier layer. The semiconductor device also includes a spacer layer conformally disposed on a portion of the barrier layer and extending onto the nitride layer. The semiconductor device further includes a gate electrode disposed on the compound semiconductor layer, and a pair of source/drain electrodes disposed on opposite sides of the gate electrode. The pair of source/drain electrodes extends through the spacer layer, the nitride layer, and at least a portion of the barrier layer.

Abstract: A semiconductor device includes a first gallium nitride layer disposed on a semiconductor substrate, and an aluminum gallium nitride layer disposed on the first gallium nitride layer. The semiconductor device also includes an upper recess and a lower recess disposed in the aluminum gallium nitride layer, wherein the upper recess adjoins the lower recess, and the upper recess has a width that is greater than that of the lower recess. The semiconductor device further includes a second gallium nitride layer disposed in the first recess and the second recess, and a gate structure disposed on the second gallium nitride layer. In addition, the semiconductor device includes a source electrode and a drain electrode disposed on the aluminum gallium nitride layer.

Abstract: A HEMT includes a buffer layer disposed on the substrate. A barrier layer is disposed on the buffer layer. A channel layer is disposed in the buffer layer adjacent to an interface of the buffer layer and the barrier layer. A band adjustment layer is disposed on the barrier layer, including a first band adjustment layer, a second band adjustment layer, and a third band adjustment layer from top to bottom. A passivation layer is disposed on the barrier layer adjoining the band adjustment layer. A gate electrode is disposed on the band adjustment layer. Source/drain electrodes are disposed on opposite sides of the gate electrode on the barrier layer through the passivation layer. The first band adjustment layer, the second band adjustment layer, and the third band adjustment layer include N-type doped, undoped, and P-type doped III-V or II-VI semiconductors, respectively.

Abstract: A semiconductor device includes a compound semiconductor layer disposed on a substrate, a protection layer disposed on the compound semiconductor layer, and a source electrode, a drain electrode and a gate electrode penetrating the protection layer and on the compound semiconductor layer, wherein the gate electrode is disposed between the source electrode and the drain electrode. The semiconductor device also includes a plurality of field plates disposed over the protection layer and between the gate electrode and the drain electrode, wherein the plurality of field plates are separated from each other. A method for fabricating the semiconductor device is also provided.

Abstract: A semiconductor device includes a first gallium nitride layer disposed on a semiconductor substrate, and an aluminum gallium nitride layer disposed on the first gallium nitride layer. The semiconductor device also includes an upper recess and a lower recess disposed in the aluminum gallium nitride layer, wherein the upper recess adjoins the lower recess, and the upper recess has a width that is greater than that of the lower recess. The semiconductor device further includes a second gallium nitride layer disposed in the first recess and the second recess, and a gate structure disposed on the second gallium nitride layer. In addition, the semiconductor device includes a source electrode and a drain electrode disposed on the aluminum gallium nitride layer.