Abstract: A method and an apparatus for real-time analysis of the district heating network is disclosed. According to an embodiment of the present disclosure, a method for analyzing a district heating network including pipes and fluids inside the pipes includes receiving, by a processor, pipe data representing a structure of the pipes; receiving, by the processor, input data on at least one of the physical state of the district heating network and the flow of fluids; calculating, by the processor, data for at least one of the physical state of the district heating network or the flow of fluids using the pipe data and the input data.

Abstract: Disclosed herein are a fluorine-doped tin oxide (FTO) transparent conductive film glass used for defogging purposes comprising a glass layer, a dielectric barrier layer, a functional layer, a metal electrode layer, a plastic intermediate layer, and a glass layer, stacked in this sequential order, in which the functional layer comprises an FTO transparent conductive film having a molar ratio of F to Sn in the range of 0.5 to 2, mainly including a (301) crystal plane and being formed by a spray coating method, and a method of fabricating the same.

Abstract: Disclosed herein are a fluorine-doped tin oxide (FTO) transparent conductive film glass used for defogging purposes comprising a glass layer, a dielectric barrier layer, a functional layer, a metal electrode layer, a plastic intermediate layer, and a glass layer, stacked in this sequential order, in which the functional layer comprises an FTO transparent conductive film having a molar ratio of F to Sn in the range of 0.5 to 2, mainly including a (301) crystal plane and being formed by a spray coating method, and a method of fabricating the same.

Abstract: A semiconductor memory device including a semiconductor substrate having a trench; a dielectric film formed on the substrate; a storage node electrode formed on the dielectric film; a first insulating film formed on the storage node electrode corresponding to the trench; a gate electrode formed on the first insulating film; a second insulating film formed on the gate electrode; a gate insulating film formed on at least one the side of gate electrode; a semiconductor layer formed on the at least one side of the first and second insulating films; and impurity regions formed in the semiconductor layer at the sides of the first and second insulating films.

Abstract: A semiconductor memory device including a semiconductor substrate having a trench; a dielectric film formed on the substrate; a storage node electrode formed on the dielectric film; a first insulating film formed on the storage node electrode corresponding to the trench; a gate electrode formed on the first insulating film; a second insulating film formed on the gate electrode; a gate insulating film formed on at least one the side of gate electrode; a semiconductor layer formed on the at least one side of the first and second insulating films; and impurity regions formed in the semiconductor layer at the sides of the first and second insulating films.

Abstract: A semiconductor memory device includes a semiconductor substrate, a first insulation film formed on the substrate, a trench formed in the substrate, an opening formed in the first insulation film above the trench, a capacitor including a dielectric film formed in the trench and a storage node formed in the trench on the dielectric film, a transfer transistor including a channel layer formed in the opening on the storage node, a gate insulation film formed on the channel layer, and a gate electrode formed on the gate insulation film, a second insulation film formed on the gate electrode, a conduction layer formed on the second insulation film, a third insulation film in contact with the channel layer, and a bit line in contact with the conduction layer.