Abstract: A multilayer electronic component includes a body including a plurality of dielectric layers and internal electrodes, and an external electrode disposed on the body and connected to the internal electrodes. The body includes an active portion including the plurality of internal electrodes to form capacitance, and cover portions disposed on the active portion, and the cover portions include an outer cover portion including a carbon compound and an inner cover portion disposed between the active portion and the outer cover portion. An average carbon content (Cc2) of the outer cover portion compared to an average carbon content (Cc1) of the inner cover portion satisfies 100?Cc2/Cc1?10,000.

Abstract: A gate driver includes clock signal lines respectively transferring clock signals, at least two of the clock signals being mutually the same; and gate driving units electrically connected to the clock signal lines, respectively and configured to sequentially generate gate signals having a multi-clock pulse based on the clock signals.

Abstract: The present disclosure relates to a display device whose image quality is improved. A display device according to an embodiment of the present disclosure includes a first display area configured to include a plurality of first pixels which are disposed at least one horizontal line; a second display area configured to include a plurality of second pixels which are disposed in a plurality of horizontal lines; and an infrared (IR) light source configured to overlap the first display area in a plan view. The plurality of first pixels are set to be in a non-emission state during a period when the IR light source is driven.

Abstract: The present disclosure relates to a display device whose image quality is improved. A display device according to an embodiment of the present disclosure includes a first display area configured to include a plurality of first pixels which are disposed at least one horizontal line; a second display area configured to include a plurality of second pixels which are disposed in a plurality of horizontal lines; and an infrared (IR) light source configured to overlap the first display area in a plan view. The plurality of first pixels are set to be in a non-emission state during a period when the IR light source is driven.

Abstract: A stage circuit including an input unit controlling voltages of a first node and a second node by using a shift pulse or a gate start pulse input to a first input terminal, a first clock signal input to a second input terminal, a second clock signal input to a third input terminal, a first power supply input to a first power supply input terminal and a second power supply input to a second power supply input terminal, and a first output unit receiving a third clock signal from a fourth input terminal and the second power supply from the second power supply input terminal and outputting a high-level scan signal to a first output terminal corresponding to the voltages of the first node and the second node.

Abstract: The present disclosure relates to a display device whose image quality is improved. A display device according to an embodiment of the present disclosure includes a first display area configured to include a plurality of first pixels which are disposed at least one horizontal line; a second display area configured to include a plurality of second pixels which are disposed in a plurality of horizontal lines; and an infrared (IR) light source configured to overlap the first display area in a plan view. The plurality of first pixels are set to be in a non-emission state during a period when the IR light source is driven.

Abstract: The present disclosure relates to a display device whose image quality is improved. A display device according to an embodiment of the present disclosure includes a first display area configured to include a plurality of first pixels which are disposed at least one horizontal line; a second display area configured to include a plurality of second pixels which are disposed in a plurality of horizontal lines; and an infrared (IR) light source configured to overlap the first display area in a plan view. The plurality of first pixels are set to be in a non-emission state during a period when the IR light source is driven.

Abstract: A stage circuit including an input unit controlling voltages of a first node and a second node by using a shift pulse or a gate start pulse input to a first input terminal, a first clock signal input to a second input terminal, a second clock signal input to a third input terminal, a first power supply input to a first power supply input terminal and a second power supply input to a second power supply input terminal, and a first output unit receiving a third clock signal from a fourth input terminal and the second power supply from the second power supply input terminal and outputting a high-level scan signal to a first output terminal corresponding to the voltages of the first node and the second node.

Abstract: The present disclosure relates to a display device whose image quality is improved. A display device according to an embodiment of the present disclosure includes a first display area configured to include a plurality of first pixels which are disposed at least one horizontal line; a second display area configured to include a plurality of second pixels which are disposed in a plurality of horizontal lines; and an infrared (IR) light source configured to overlap the first display area in a plan view. The plurality of first pixels are set to be in a non-emission state during a period when the IR light source is driven.

Abstract: An organic light emitting diode display includes: a substrate; a scan line, a first emission control line, and a second emission control line on the substrate; a data line and a driving voltage line crossing the scan line; a switching transistor connected to the scan line and the data line and including a switching drain electrode; a driving transistor including a driving source electrode connected to the switching drain electrode; an organic light emitting diode electrically connected to a driving drain electrode of the driving transistor; an operation control transistor to transmit a driving voltage to the driving transistor; and a first emission control transistor and second emission control transistor to transmit the driving voltage from the driving transistor to the organic light emitting diode, wherein the first emission control line and the second emission control line partially overlap each other.

Abstract: A gate driver includes clock signal lines respectively transferring clock signals, at least two of the clock signals being mutually the same; and gate driving units electrically connected to the clock signal lines, respectively and configured to sequentially generate gate signals having a multi-clock pulse based on the clock signals.

Abstract: A display device is disclosed. In one aspect, the display device includes a display panel including a plurality of pixels divided into a plurality of block regions. The block regions are arranged in a scan direction. The display device also includes a display panel driver configured to sequentially drive the block regions and apply a plurality of first emission signals to the pixels. Each of the first emission signals has an activation voltage. The display device further includes a timing controller configured to control the display panel driver. The display panel driver is further configured to incrementally change the activation voltages of the first emission signals applied to the pixels in each of the block regions in the scan direction.

Abstract: A display panel includes a plurality of pixel circuits. Each of pixel circuits comprises an emission unit including an organic light emitting diode, a pixel driving unit configured to drive an emission unit based on a scan signal and a data signal, and a switch unit configured to control an electrical connection between an emission unit and a pixel driving unit based on an emission signal. A first parasitic capacitance between an emission unit included in a first pixel circuit of pixel circuits and a pixel driving unit included in a first pixel circuit is smaller than a second parasitic capacitance between an emission unit included in a first pixel circuit and a pixel driving unit included in a second pixel circuit of pixel circuits adjacent to a first pixel circuit.

Abstract: A display device is disclosed. In one aspect, the display device includes a display panel including a plurality of pixels divided into a plurality of block regions. The block regions are arranged in a scan direction. The display device also includes a display panel driver configured to sequentially drive the block regions and apply a plurality of first emission signals to the pixels. Each of the first emission signals has an activation voltage. The display device further includes a timing controller configured to control the display panel driver. The display panel driver is further configured to incrementally change the activation voltages of the first emission signals applied to the pixels in each of the block regions in the scan direction.

Abstract: Display panels and display devices including the display panels are disclosed. In one aspect, a display panel includes a gate driver configured to output a scan line enable signal based on an enable signal and a control signal configured to be determined based on resolution of display data, a data driver configured to output the display data based on the control signal, and a pixel array including a plurality of pixels configured to be enabled by a scan line enable signal and display an image corresponding to the display data.

Abstract: An organic light emitting diode display includes: a substrate; a scan line, a first emission control line, and a second emission control line on the substrate; a data line and a driving voltage line crossing the scan line; a switching transistor connected to the scan line and the data line and including a switching drain electrode; a driving transistor including a driving source electrode connected to the switching drain electrode; an organic light emitting diode electrically connected to a driving drain electrode of the driving transistor; an operation control transistor to transmit a driving voltage to the driving transistor; and a first emission control transistor and second emission control transistor to transmit the driving voltage from the driving transistor to the organic light emitting diode, wherein the first emission control line and the second emission control line partially overlap each other.

Abstract: A thin film transistor, a pixel, and an organic light emitting diode (OLED) display including the same are disclosed. The thin film transistor includes a connection to the channel region separate from connections to the source and drain.

Abstract: A pixel capable of stably compensating for a threshold voltage is disclosed. The pixel includes an organic light emitting diode (OLED), a driving transistor having a gate electrode, a source electrode, and first and second drain electrodes. The pixel also has a plurality of second transistors serially coupled between the first drain electrode and a gate electrode of the driving transistor, and a node electrically coupled to the second drain electrode and to each of the second transistors.

Abstract: A display panel includes a plurality of pixel circuits. Each of pixel circuits comprises an emission unit including an organic light emitting diode, a pixel driving unit configured to drive an emission unit based on a scan signal and a data signal, and a switch unit configured to control an electrical connection between an emission unit and a pixel driving unit based on an emission signal. A first parasitic capacitance between an emission unit included in a first pixel circuit of pixel circuits and a pixel driving unit included in a first pixel circuit is smaller than a second parasitic capacitance between an emission unit included in a first pixel circuit and a pixel driving unit included in a second pixel circuit of pixel circuits adjacent to a first pixel circuit.

Abstract: An organic light emitting display device includes a plurality of pixels at areas defined by intersections of scan lines, emission control lines, and data lines. A data driver supplies data signals to the data lines. A scan driver supplies scan signals to the scan lines and progressively supplies a reference power source voltage and an emission control signal to the emission control lines. The reference power source voltage is set to a voltage greater than a voltage of the scan signal and less than a voltage of the emission control signal.