Patents by Inventor Chang Yong Choi
Chang Yong Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11410814Abstract: A multilayer electronic component includes a body comprising a capacitance-forming portion including a dielectric layer and a plurality of internal electrodes layered with the dielectric layer interposed therebetween, and upper and lower cover portions disposed on upper and lower surfaces of the capacitance-forming portion, respectively; and external electrodes disposed on the body and electrically connected to at least some of the plurality of internal electrodes, respectively, wherein at least one of the upper cover portion and or the lower cover portion has a step structure, and the step structure has a shorter length and width as compared to the capacitance-forming portion.Type: GrantFiled: February 16, 2021Date of Patent: August 9, 2022Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seul Gi Kim, Jin Sung Chun, Chang Yong Choi
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Publication number: 20220076888Abstract: A multilayer electronic component includes a body comprising a capacitance-forming portion including a dielectric layer and a plurality of internal electrodes layered with the dielectric layer interposed therebetween, and upper and lower cover portions disposed on upper and lower surfaces of the capacitance-forming portion, respectively; and external electrodes disposed on the body and electrically connected to at least some of the plurality of internal electrodes, respectively, wherein at least one of the upper cover portion and or the lower cover portion has a step structure, and the step structure has a shorter length and width as compared to the capacitance-forming portion.Type: ApplicationFiled: February 16, 2021Publication date: March 10, 2022Inventors: Seul Gi KIM, Jin Sung CHUN, Chang Yong CHOI
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Publication number: 20210027261Abstract: The present inventive concept relates to a system for operating a region-originating development platform, comprising: a service server for coordinating a regional service between a physical card and a mobile terminal of a user, one or more regional member stores, and a regional integration server; and an operation management portal running on the service server, comprising a system portal part used to operate a system within the service server, a platform portal part for managing one or more merchandises offered as the regional service, and a partner portal part for managing partners including member stores, where the regional integration server comprises sub-institution servers in a layered structure to operate in conjunction with one or more base center servers at a lower level, and the mobile terminal runs a service application for providing the regional service and comprises information of at least one mobile card issued upon a request.Type: ApplicationFiled: July 25, 2019Publication date: January 28, 2021Applicants: Incheon Metropolitan City, KONA I CO., LTD.Inventors: Kwang Ho AN, In Pyo HONG, Dong Hoon BYUN, Sang Joong KIM, Chang Yong CHOI
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Patent number: 10251051Abstract: A method for providing a multi number service using a universal integrated circuit card (UICC) comprises the steps of: according to a command received from the outside of a UICC, selecting any one subscriber identification information set among a plurality of subscriber identification information sets stored in a memory allocated to a subscriber identification information set managing application; and activating the selected subscriber identification information set.Type: GrantFiled: October 26, 2017Date of Patent: April 2, 2019Assignee: KONA I CO., LTDInventors: Chung Il Cho, Sung Hwan Kim, Young Min Son, Chang Yong Choi, Joo Yeol Oh, Hyun Sung Hong
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Patent number: 10136307Abstract: A method for providing a multi number service using a universal integrated circuit card (UICC) comprises the steps of: according to a command received from the outside of a UICC, selecting any one subscriber identification information set among a plurality of subscriber identification information sets stored in a memory allocated to a subscriber identification information set managing application; and activating the selected subscriber identification information set.Type: GrantFiled: October 26, 2017Date of Patent: November 20, 2018Assignee: KONA I CO., LTDInventors: Chung Il Cho, Sung Hwan Kim, Young Min Son, Chang Yong Choi, Joo Yeol Oh, Hyun Sung Hong
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Publication number: 20180077562Abstract: A method for providing a multi number service using a universal integrated circuit card (UICC) comprises the steps of: according to a command received from the outside of a UICC, selecting any one subscriber identification information set among a plurality of subscriber identification information sets stored in a memory allocated to a subscriber identification information set managing application; and activating the selected subscriber identification information set.Type: ApplicationFiled: October 26, 2017Publication date: March 15, 2018Inventors: Chung Il Cho, Sung Hwan Kim, Young Min Son, Chang Yong Choi, Joo Yeol Oh, Hyun Sung Hong
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Publication number: 20180049021Abstract: A method for providing a multi number service using a universal integrated circuit card (UICC) comprises the steps of: according to a command received from the outside of a UICC, selecting any one subscriber identification information set among a plurality of subscriber identification information sets stored in a memory allocated to a subscriber identification information set managing application; and activating the selected subscriber identification information set.Type: ApplicationFiled: October 26, 2017Publication date: February 15, 2018Inventors: Chung Il Cho, Sung Hwan Kim, Young Min Son, Chang Yong Choi, Joo Yeol Oh, Hyun Sung Hong
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Patent number: 9865677Abstract: Provided is a super junction semiconductor device. The super junction semiconductor device includes a vertical pillar region located in an active region and horizontal pillar regions located in a termination region that are connected with each other while simultaneously not floating the entire pillar region in the termination region. Thus, a charge compensation difference, generated among pillar regions, is caused to be offset, although the length of the termination region is relatively short.Type: GrantFiled: July 14, 2015Date of Patent: January 9, 2018Assignee: Magnachip Semiconductor, Ltd.Inventors: Hyuk Woo, Dae Byung Kim, Chang Yong Choi, Ki Tae Kang, Kwang Yeon Jun, Moon Soo Cho, Soon Tak Kwon
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Patent number: 9832634Abstract: A method for providing a multi number service using a universal integrated circuit card (UICC) comprises the steps of: according to a command received from the outside of a UICC, selecting any one subscriber identification information set among a plurality of subscriber identification information sets stored in a memory allocated to a subscriber identification information set managing application; and activating the selected subscriber identification information set.Type: GrantFiled: February 23, 2015Date of Patent: November 28, 2017Assignee: KONA I CO., LTD.Inventors: Chung Il Cho, Sung Hwan Kim, Young Min Son, Chang Yong Choi
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Patent number: 9496335Abstract: There is provided a super junction semiconductor device and a method of manufacturing the same. A super junction semiconductor device includes an n-type semiconductor region disposed in a substrate, two or more p-type semiconductor regions disposed adjacent to the n-type semiconductor region alternately in a direction parallel to a surface of the substrate, a p-type body region disposed on at least one of the p-type semiconductor regions, and a source region disposed in the p-type body region, and an n-type ion implantation region is formed along a lower end of the n-type semiconductor region and lower ends of the p-type semiconductor regions.Type: GrantFiled: October 14, 2015Date of Patent: November 15, 2016Assignee: Magnachip Semiconductor, Ltd.Inventors: Kwang Yeon Jun, Chang Yong Choi, Hyuk Woo, Moon Soo Cho, Soon Tak Kwon
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Patent number: 9472614Abstract: There is provided a super junction semiconductor device. The super junction semiconductor device includes a cell area and a junction termination area disposed on a substrate, and a transition area disposed between the cell area and the junction termination area, and the cell area, the junction termination area, and the transition area each include one or more unit cells comprising a N-type pillar region and a P-type pillar region among a plurality of N-type pillar regions and a P-type pillar regions that are alternated between the cell area and the junction termination area.Type: GrantFiled: March 26, 2014Date of Patent: October 18, 2016Assignee: Magnachip Semiconductor, Ltd.Inventors: Moon Soo Cho, Chang Yong Choi, Soon Tak Kwon, Kwang Yeon Jun, Dae Byung Kim, Hyuk Woo
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Publication number: 20160035825Abstract: There is provided a super junction semiconductor device and a method of manufacturing the same. A super junction semiconductor device includes an n-type semiconductor region disposed in a substrate, two or more p-type semiconductor regions disposed adjacent to the n-type semiconductor region alternately in a direction parallel to a surface of the substrate, a p-type body region disposed on at least one of the p-type semiconductor regions, and a source region disposed in the p-type body region, and an n-type ion implantation region is formed along a lower end of the n-type semiconductor region and lower ends of the p-type semiconductor regions.Type: ApplicationFiled: October 14, 2015Publication date: February 4, 2016Applicant: MAGNACHIP SEMICONDUCTOR, LTD.Inventors: Kwang Yeon JUN, Chang Yong CHOI, Hyuk WOO, Moon Soo CHO, Soon Tak KWON
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Publication number: 20160020273Abstract: Provided is a super junction semiconductor device. The super junction semiconductor device includes a vertical pillar region located in an active region and horizontal pillar regions located in a termination region that are connected with each other while simultaneously not floating the entire pillar region in the termination region. Thus, a charge compensation difference, generated among pillar regions, is caused to be offset, although the length of the termination region is relatively short.Type: ApplicationFiled: July 14, 2015Publication date: January 21, 2016Applicant: MAGNACHIP SEMICONDUCTOR, LTD.Inventors: Hyuk WOO, Dae Byung KIM, Chang Yong CHOI, Ki Tae KANG, Kwang Yeon JUN, Moon Soo CHO, Soon Tak KWON
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Patent number: 9190469Abstract: There is provided a super junction semiconductor device and a method of manufacturing the same. A super junction semiconductor device includes an n-type semiconductor region disposed in a substrate, two or more p-type semiconductor regions disposed adjacent to the n-type semiconductor region alternately in a direction parallel to a surface of the substrate, a p-type body region disposed on at least one of the p-type semiconductor regions, and a source region disposed in the p-type body region, and an n-type ion implantation region is formed along a lower end of the n-type semiconductor region and lower ends of the p-type semiconductor regions.Type: GrantFiled: April 1, 2014Date of Patent: November 17, 2015Assignee: MagnaChip Semiconductor, Ltd.Inventors: Kwang Yeon Jun, Chang Yong Choi, Hyuk Woo, Moon Soo Cho, Soon Tak Kwon
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Publication number: 20150076600Abstract: There is provided a super junction semiconductor device and a method of manufacturing the same. A super junction semiconductor device includes an n-type semiconductor region disposed in a substrate, two or more p-type semiconductor regions disposed adjacent to the n-type semiconductor region alternately in a direction parallel to a surface of the substrate, a p-type body region disposed on at least one of the p-type semiconductor regions, and a source region disposed in the p-type body region, and an n-type ion implantation region is formed along a lower end of the n-type semiconductor region and lower ends of the p-type semiconductor regions.Type: ApplicationFiled: April 1, 2014Publication date: March 19, 2015Applicant: MagnaChip Semiconductor, Ltd.Inventors: Kwang Yeon JUN, Chang Yong CHOI, Hyuk WOO, Moon Soo CHO, Soon Tak KWON
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Publication number: 20150076599Abstract: There is provided a super junction semiconductor device. The super junction semiconductor device includes a cell area and a junction termination area disposed on a substrate, and a transition area disposed between the cell area and the junction termination area, and the cell area, the junction termination area, and the transition area each include one or more unit cells comprising a N-type pillar region and a P-type pillar region among a plurality of N-type pillar regions and a P-type pillar regions that are alternated between the cell area and the junction termination area.Type: ApplicationFiled: March 26, 2014Publication date: March 19, 2015Applicant: MAGNACHIP SEMICONDUCTOR, LTD.Inventors: Moon Soo CHO, Chang Yong CHOI, Soon Tak KWON, Kwang Yeon JUN, Dae Byung KIM, Hyuk WOO
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Publication number: 20080081612Abstract: A method and apparatus for updating a regional reference time of a mobile communication terminal by a regional standard time difference according to a Network Identity and Time Zone (NITZ) information change in an asynchronous transfer mode-based mobile communication system are provided. The method of updating a regional reference time of a mobile communication terminal includes determining whether new regional standard time information is received and calculating, if a regional standard time information is changed, a regional standard time difference, which may have a positive or negative value; and resetting the regional reference time by adding the regional standard time difference to a preset regional reference time.Type: ApplicationFiled: September 20, 2007Publication date: April 3, 2008Inventors: Jung Kuk Seo, Sang Jae Bae, Chang Yong Choi, Sung Gi Baek
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Patent number: 7345165Abstract: A method for the preparation of water-soluble chitosan with high purity and biological activity includes steps of: reacting chitosan oligo sugar acid salt, covalently bonded to an organic or inorganic acid, with trialkylamine in phosphate buffered saline followed by addition of an organic solvent to remove acid salt at C-2 position; adding the thus obtained reaction mixture to an inorganic acid to remove trialkylamine salt at C-6 position; and passing the thus obtained free amine chitosan through an activated carbon/ion exchange resin. The free amine chitosan is water-soluble and has a high bioavailability for application to the medicine and food industries.Type: GrantFiled: April 16, 2002Date of Patent: March 18, 2008Assignee: Jae Woon NahInventors: Mi Kyeong Jang, Chang Yong Choi, Won Seok Kim, Byeong Gi Kong, Young Il Jeong, Hyun Pil Yang, Ji Tae Jang
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Publication number: 20040260077Abstract: A method for the preparation of water-soluble chitosan with high purity and biological activity includes steps of: reacting chitosan oligo sugar acid salt, covalently bonded to an organic or inorganic acid, with trialkylamine in phosphate buffered saline followed by addition of an organic solvent to remove acid salt at C-2 position; adding the thus obtained reaction mixture to an inorganic acid to remove trialkylamine salt at C-6 position; and passing the thus obtained free amine chitosan through an activated carbon/ion exchange resin. The free amine chitosan is water-soluble and has a high bioavailability for application to the medicine and food industries.Type: ApplicationFiled: March 12, 2004Publication date: December 23, 2004Inventors: Mi Kyeong Jang, Chang Yong Choi, Won Seok Kim, Byeong Gi Kong, Young Il Jeong, Hyun Pil Yang, Ji Tae Jang