Patents by Inventor Chang-Yu Wu

Chang-Yu Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9203405
    Abstract: A circuit includes a clock trigger block and a logic circuit. The logic circuit is configured to output a signal to the clock trigger block based on a logic level of an enable signal received at the logic circuit. The clock trigger block is configured to output an output signal response to a clock signal received at the clock trigger block and the signal received from the logic circuit.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: December 1, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Lin Liu, Shang-Chih Hsieh, Lee-Chung Lu, Meng-Hsueh Wang, Chang-Yu Wu
  • Publication number: 20150340944
    Abstract: The present invention discloses a light emitting device driver circuit, a current ripple rejecter therein, and a current ripple rejection method therefor. The light emitting device driver circuit includes: a power converter circuit, for converting an input voltage carrying an AC component to an output voltage and supplying an output current; and a current ripple rejecter, which is coupled to the power converter circuit, for filtering a ripple of the output current to generate a light emitting device current, and supplying the light emitting device current to a light emitting device circuit. The current ripple rejecter includes: a low-pass-filter circuit, for filtering the ripple of the output current to generate a filtered current; and a current amplification circuit, which is coupled to the low-pass-filter circuit, for amplifying the filtered current to generate an amplified current; wherein the light emitting device current includes the amplified current.
    Type: Application
    Filed: May 7, 2015
    Publication date: November 26, 2015
    Applicant: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Tzu-Chen Lin, Chang-Yu Wu, Isaac Y. Chen
  • Patent number: 9142630
    Abstract: Among other things, one or more techniques for enhancing device (e.g., transistor) performance are provided herein. In one embodiment, device performance is enhanced by forming an extended dummy region at an edge of a region of a device and forming an active region at a non-edge of the region. Limitations associated with semiconductor fabrication processing present in the extended dummy region more so than in non-edge regions. Accordingly, a device exhibiting enhanced performance is formed by connecting a gate to the active region, where the active region has a desired profile because it is comprised within a non-edge of the region. A dummy device (e.g., that may be less responsive) may be formed to include the extended dummy region, where the extended dummy region has a less than desired profile due to limitations associated with semiconductor fabrication processing, for example.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: September 22, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co. Limited
    Inventors: Chang-Yu Wu, Chih-Chiang Chang, Shang-Chih Hsieh, Wei-Chih Hsieh
  • Patent number: 9126140
    Abstract: Embodiments of the present disclosure provide for collection devices, methods of making collection devices, methods of collecting gases and aerosol particles, and the like.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: September 8, 2015
    Assignee: UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC.
    Inventors: Chang-Yu Wu, Yu-Mei Hsu, Alex Theodore, Lin Shou, Danielle Lyon Hall
  • Patent number: 9123565
    Abstract: An integrated circuit layout that includes a first standard cell having a first transistor region and a second transistor region; a second standard cell having a third transistor region and a fourth transistor region. The first and second standard cells adjoin each other at side boundaries thereof and the first transistor region and the third transistor region are formed in a first continuous active region, and the second transistor region and the fourth transistor region are formed in a second continuous region.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: September 1, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Lee-Chung Lu, Li-Chun Tien, Hui-Zhong Zhuang, Chang-Yu Wu
  • Patent number: 9084958
    Abstract: Embodiments of the present disclosure provide for collection devices, methods of making collection devices, methods of collecting gases and aerosol particles, and the like.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: July 21, 2015
    Assignee: UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC.
    Inventors: Chang-Yu Wu, Yu-Mei Hsu, Alex Theodore, Lin Shou, Danielle Lyon Hall
  • Patent number: 9078940
    Abstract: In accordance with the purpose(s) of the present disclosure, as embodied and broadly described herein, embodiments of the present disclosure, in one aspect, relate to infrared (IR) filter systems, methods of using the IR filter systems, and methods of degrading a contaminant, and the like.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: July 14, 2015
    Assignee: University of Florida Research Foundation, Inc.
    Inventors: Brian Eduardo Damit, Chang-Yu Wu
  • Publication number: 20150162910
    Abstract: A circuit includes a clock trigger block and a logic circuit. The logic circuit is configured to output a signal to the clock trigger block based on a logic level of an enable signal received at the logic circuit. The clock trigger block is configured to output an output signal response to a clock signal received at the clock trigger block and the signal received from the logic circuit.
    Type: Application
    Filed: May 15, 2014
    Publication date: June 11, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Lin LIU, Shang-Chih HSIEH, Lee-Chung LU, Meng-Hsueh WANG, Chang-Yu WU
  • Publication number: 20150162821
    Abstract: A power factor correction (PFC) circuit of a power converter is disclosed. The power converter includes a primary side coil, a secondary side coil, an inductive coil, and a power switch. The PFC circuit includes a zero current detection circuit for detecting an inductive signal of the inductive coil to generate a detection signal; an error detection circuit for generating an error signal corresponding to an output voltage signal or an output current signal according to a reference signal; a ramp signal generating circuit for generating a ramp signal; a comparison circuit for comparing the ramp signal with the error signal to generate a comparison signal; and a trigger circuit for generating a control signal to control the power switch and for controlling the ramp signal generating circuit to adjust a slope of the ramp signal according to the detection signal and the comparison signal.
    Type: Application
    Filed: November 19, 2014
    Publication date: June 11, 2015
    Applicant: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Chang-Yu WU, Tzu-Chen LIN
  • Publication number: 20150157757
    Abstract: In accordance with the purpose(s) of the present disclosure, as embodied and broadly described herein, embodiments of the present disclosure, in one aspect, relate to infrared (IR) filter systems, methods of using the IR filter systems, and methods of degrading a contaminant, and the like.
    Type: Application
    Filed: January 15, 2015
    Publication date: June 11, 2015
    Inventors: Brian Eduardo Damit, Chang-Yu Wu
  • Patent number: 8963109
    Abstract: In accordance with the purpose(s) of the present disclosure, as embodied and broadly described herein, embodiments of the present disclosure, in one aspect, relate to infrared (IR) filter systems, methods of using the IR filter systems, and methods of degrading a contaminant, and the like.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: February 24, 2015
    Inventors: Brian Eduardo Damit, Chang-Yu Wu
  • Publication number: 20140073054
    Abstract: The invention provides a yeast strain and a method for making the same. The method has the step of replacing the regulation region upstream of the hsp104 gene in the genome of the yeast, so as to accelerate and prolong the expression span of hsp104 gene and enhance the capability of the yeast to ferment and produce ethanol in a high-temperature environment. The yeast is capable of fermenting glucose at a temperature higher than 42° C. to produce ethanol, or biomass ethanol, wherein the ethanol production ratio based on fermentation of glucose is higher than 97%. Being able to synchronize the degradation/hydrolysis stage and fermentation stage of biomass ethanol producing process, the yeast in accordance with the present invention is able to lower the production cost of biomass ethanol and further raise the productivity with its high ethanol production ratio.
    Type: Application
    Filed: September 11, 2012
    Publication date: March 13, 2014
    Applicant: NATIONAL CHUNG CHENG UNIVERSITY
    Inventors: KUANG-TSE HUANG, Hau-Ren Chen, Wen-Chien Lee, Chang-Yu Wu, Hsin-Cheng Chen, Yu-Long Wu, Meng-Tsu Tsai, Ju-Ping Yeh, Yu-Wei Liang, Yu-Shiuan Lai
  • Patent number: 8667349
    Abstract: A scan-flip flop circuit includes an input stage for providing a data signal to a data node, wherein the input stage includes first and second stacks of transistors devices coupled to the data node. The first stack receives a data input signal during a normal operation mode for input to the data node, and the second stack receiving a scan input signal during a scan test mode for input to the data node. The scan flip-flop circuit also includes a master latch coupled directly to the data node for latching the data signal from the input stage and outputting the data signal; a slave latch coupled to an output of the master latch for latching the output from the master latch and outputting the output; and a scan and clock control logic module. The scan and clock control logic module controls the first stack to input the data input signal to the data node during normal operation mode.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: March 4, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shang-Chih Hsieh, Chih-Chiang Chang, Chang-Yu Wu
  • Patent number: 8663970
    Abstract: The invention provides a yeast strain and a method for making the same. The method has the step of replacing the regulation region upstream of the hsp104 gene in the genome of the yeast, so as to accelerate and prolong the expression span of hsp104 gene and enhance the capability of the yeast to ferment and produce ethanol in a high-temperature environment. The yeast is capable of fermenting glucose at a temperature higher than 42° C. to produce ethanol, or biomass ethanol, wherein the ethanol production ratio based on fermentation of glucose is higher than 97%. Being able to synchronize the degradation/hydrolysis stage and fermentation stage of biomass ethanol producing process, the yeast in accordance with the present invention is able to lower the production cost of biomass ethanol and further raise the productivity with its high ethanol production ratio.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: March 4, 2014
    Assignee: National Chung Cheng University
    Inventors: Kuang-Tse Huang, Hau-Ren Chen, Wen-Chien Lee, Chang-Yu Wu, Hsin-Cheng Chen, Yu-Long Wu, Meng-Tsu Tsai, Ju-Ping Yeh, Yu-Wei Liang, Yu-Shiuan Lai
  • Publication number: 20140027821
    Abstract: Among other things, one or more techniques for enhancing device (e.g., transistor) performance are provided herein. In one embodiment, device performance is enhanced by forming an extended dummy region at an edge of a region of a device and forming an active region at a non-edge of the region. Limitations associated with semiconductor fabrication processing present in the extended dummy region more so than in non-edge regions. Accordingly, a device exhibiting enhanced performance is formed by connecting a gate to the active region, where the active region has a desired profile because it is comprised within a non-edge of the region. A dummy device (e.g., that may be less responsive) may be formed to include the extended dummy region, where the extended dummy region has a less than desired profile due to limitations associated with semiconductor fabrication processing, for example.
    Type: Application
    Filed: July 25, 2012
    Publication date: January 30, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chang-Yu Wu, Chih-Chiang Chang, Shang-Chih Hsieh, Wei-Chih Hsieh
  • Patent number: 8610375
    Abstract: An adaptive bleeder circuit is applicable to a power converter, in which the power converter has a transformer primary side and a transformer secondary side, and the power converter enables input power to be selectively input or not input to the transformer primary side through a pulse-width-modulated signal. The adaptive bleeder circuit includes a switched bleeder circuit, and the bleeder circuit switch dynamically adjusts a turn on/off ratio (or referred to as duty ratio) of the switch element according to the TRIAC holding current and the converter input current of an alternating current (AC) TRIAC. When the input current is less than the holding current, the bleeder circuit increases conduction time ratio of the pulse-width-modulated signal, such that the input current recovers to the holding current to maintain normal conduction of the AC TRIAC.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: December 17, 2013
    Assignee: Macroblock, Inc.
    Inventors: Lon-Kou Chang, Chang-Yu Wu, Li-Wei Yen
  • Patent number: 8585795
    Abstract: In accordance with the invention there are devices and processes for making ceramic nanofiber mats and ceramic filters for use in high temperature and in corrosive environments. The process for forming a ceramic filter can include electrospinning a preceramic polymer solution into a preceramic polymer fiber having a diameter from about 10 nm to about 1 micron and forming a preceramic polymer fiber web from the preceramic polymer fiber onto a collector. The process can also include pyrolyzing the preceramic polymer fiber web to form a ceramic nanofiber mat having a diameter less than the diameter of the preceramic polymer fiber, the ceramic nanofiber mat comprising one or more of an oxide ceramic and a non-oxide ceramic such that the ceramic fiber mat can withstand temperature greater than about 1000 ° C.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: November 19, 2013
    Assignee: Univesity of Florida Research Foundation, Inc.
    Inventors: Wolfgang M. Sigmund, Vasana Maneeratana, Paolo Colombo, Chang-Yu Wu, Hyoungjun Park, Qi Zhang
  • Patent number: 8575901
    Abstract: An auto-selecting holding current circuit is applicable to a converter. A primary side of the converter has a Triode for Alternating Current (TRIAC) and a bleeder circuit. The auto-selecting holding current circuit includes a first sensor module, a second sensor module and a reference voltage selecting circuit. The first sensor module detects an input current drop time or an input voltage drop time to output a sense signal. The second sensor module receives a current detector signal and outputs a critical current signal to detect a holding-current value range of the TRIAC. The reference voltage selecting circuit outputs a reference current signal to the bleeder circuit, and the reference current signal corresponds to a holding-current value of the TRIAC. Therefore, the bleeder circuit maintains normal operation of the TRIACs with different holding-current values.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: November 5, 2013
    Assignee: Macroblock, Inc.
    Inventors: Lon-Kou Chang, Hsing-Fu Liu, Chang-Yu Wu, Li-Wei Yen
  • Publication number: 20130239808
    Abstract: Embodiments of the present disclosure provide for collection devices, methods of making collection devices, methods of collecting gases and aerosol particles, and the like.
    Type: Application
    Filed: April 1, 2013
    Publication date: September 19, 2013
    Applicant: University of Florida Research Foundation, Inc.
    Inventors: Chang-Yu Wu, Yu-Mei Hsu, Alex Theodore, Lin Shou, Danielle Lyon Hall
  • Publication number: 20130192463
    Abstract: Embodiments of the present disclosure provide for collection devices, methods of making collection devices, methods of collecting gases and aerosol particles, and the like.
    Type: Application
    Filed: October 17, 2011
    Publication date: August 1, 2013
    Inventors: Chang-Yu Wu, Yu-Mei Hsu, Alex Theodore, Lin Shou, Danielle Lyon Hall