Patents by Inventor Chang Yul Oh

Chang Yul Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11495546
    Abstract: A substrate having an electronic component embedded therein includes a core substrate including first and second wiring layers disposed on different levels and one or more insulating layers disposed between the first and second wiring layers, having a cavity in which a stopper layer is disposed on a bottom surface of the cavity, and including a groove disposed around the stopper layer on the bottom surface; an electronic component disposed on the stopper layer in the cavity; an insulating material covering at least a portion of each of the core substrate and the electronic component and disposed in at least a portion of each of the cavity and the groove; and a third wiring layer disposed on the insulating material. The stopper layer protrudes on the bottom surface.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: November 8, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Je Sang Park, Chang Yul Oh, Sang Ho Jeong, Yong Duk Lee
  • Patent number: 11244905
    Abstract: A substrate with an electronic component embedded therein includes a core substrate including an insulating body having a first surface and a second surface, opposite to the first surface, a first wiring layer embedded in the insulating body such that one surface thereof is exposed from the first surface, and a second wiring layer disposed on the insulating body to protrude on the second surface, the core substrate having a cavity penetrating a portion of the insulating body from the first surface toward the second surface and having a stopper layer as a bottom surface thereof; an electronic component disposed on the stopper layer in the cavity; a first insulating material covering at least a portion of each of the core substrate and the electronic component; and a third wiring layer disposed on the first insulating material.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: February 8, 2022
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Je Sang Park, Chang Yul Oh, Sang Ho Jeong, Yong Duk Lee
  • Publication number: 20210183783
    Abstract: A substrate with an electronic component embedded therein includes a core substrate including an insulating body having a first surface and a second surface, opposite to the first surface, a first wiring layer embedded in the insulating body such that one surface thereof is exposed from the first surface, and a second wiring layer disposed on the insulating body to protrude on the second surface, the core substrate having a cavity penetrating a portion of the insulating body from the first surface toward the second surface and having a stopper layer as a bottom surface thereof; an electronic component disposed on the stopper layer in the cavity; a first insulating material covering at least a portion of each of the core substrate and the electronic component; and a third wiring layer disposed on the first insulating material.
    Type: Application
    Filed: February 20, 2020
    Publication date: June 17, 2021
    Inventors: Je Sang Park, Chang Yul Oh, Sang Ho Jeong, Yong Duk Lee
  • Publication number: 20210175159
    Abstract: A substrate having an electronic component embedded therein includes a core substrate including first and second wiring layers disposed on different levels and one or more insulating layers disposed between the first and second wiring layers, having a cavity in which a stopper layer is disposed on a bottom surface of the cavity, and including a groove disposed around the stopper layer on the bottom surface; an electronic component disposed on the stopper layer in the cavity; an insulating material covering at least a portion of each of the core substrate and the electronic component and disposed in at least a portion of each of the cavity and the groove; and a third wiring layer disposed on the insulating material. The stopper layer protrudes on the bottom surface.
    Type: Application
    Filed: February 26, 2020
    Publication date: June 10, 2021
    Inventors: Je Sang PARK, Chang Yul OH, Sang Ho JEONG, Yong Duk LEE
  • Patent number: 10863627
    Abstract: An electronic component-embedded substrate of the present disclosure includes a core structure including an insulating layer, a first wiring layer disposed on an upper surface of the insulating layer and a through-portion passing through the insulating layer; a first electronic component disposed in the through-portion and including a connection electrode; an insulator disposed in a portion of the through-portion between the core structure and a portion of the first electronic component; and a first metal layer disposed on an upper surface of the insulator. At least a portion of the first metal layer is included on the first wiring layer and physically in contact with at least a portion of the connection electrode.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: December 8, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Je Sang Park, Sang Ho Jeong, Chang Yul Oh
  • Patent number: 8517249
    Abstract: A soldering structure using Zn includes a bonding layer which contains Zn; and a lead-free solder which bonds and reacts to the bonding layer. The bonding layer can be a Zn alloy layer or a multilayer including a Zn layer. Accordingly, the characteristics of the soldering structure can be improved by involving the high reactive Zn to the interfacial reaction of the soldering.
    Type: Grant
    Filed: October 15, 2007
    Date of Patent: August 27, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-kyoung Choi, Chang-youl Moon, Yoon-chul Son, Young-ho Kim, Hee-ra Roh, Chang-yul Oh
  • Patent number: 7807215
    Abstract: Disclosed herein is a method of manufacturing a copper-clad laminate for Via-On-Pad application. The pad includes the steps of providing a first copper foil layer and a second copper foil layer, on the first surfaces of which protective layers are formed; placing two sets of a first copper foil layer, an insulating layer and a second copper foil layer above and below an adhesive layer, respectively; removing the protective layers, which have been respectively formed on the second copper foil layers, and parts of the second copper foil layers; forming via holes by removing parts of the insulating layers through the regions from which the parts of the second copper foil layers have been removed, using laser processing; and forming two copper-clad laminates by removing the protective layers, which have been respectively formed on one surface of one first copper foil layer and one surface of the other first copper foil layer, and the adhesive layer.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: October 5, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong Jin Lee, Young Hwan Shin, Jae Min Choi, Chang Yul Oh
  • Publication number: 20080223906
    Abstract: A soldering structure using Zn includes a bonding layer which contains Zn; and a lead-free solder which bonds and reacts to the bonding layer. The bonding layer can be a Zn alloy layer or a multilayer including a Zn layer. Accordingly, the characteristics of the soldering structure can be improved by involving the high reactive Zn to the interfacial reaction of the soldering.
    Type: Application
    Filed: October 15, 2007
    Publication date: September 18, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Won-kyoung Choi, Chang-youl Moon, Yoon-chul Son, Young-ho Kim, Hee-ra Roh, Chang-yul Oh
  • Publication number: 20080073025
    Abstract: Disclosed herein is a method of manufacturing a copper-clad laminate for Via-On-Pad application. The pad includes the steps of providing a first copper foil layer and a second copper foil layer, on the first surfaces of which protective layers are formed; placing two sets of a first copper foil layer, an insulating layer and a second copper foil layer above and below an adhesive layer, respectively; removing the protective layers, which have been respectively formed on the second copper foil layers, and parts of the second copper foil layers; forming via holes by removing parts of the insulating layers through the regions from which the parts of the second copper foil layers have been removed, using laser processing; and forming two copper-clad laminates by removing the protective layers, which have been respectively formed on one surface of one first copper foil layer and one surface of the other first copper foil layer, and the adhesive layer.
    Type: Application
    Filed: September 21, 2006
    Publication date: March 27, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jong Jin Lee, Young Hwan Shin, Jae Min Choi, Chang Yul Oh