Patents by Inventor Changgang YIN

Changgang YIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230284375
    Abstract: The present application relates to a circuit technology, and discloses a printed circuit board, including: a board body portion comprising a plurality of core boards and a plurality of dielectric layers, the plurality of core boards including a plurality of conductor layers, and the plurality of conductor layers including a differential signal transmission layer located on a surface layer of the board body portion and a differential signal line out layer located on an inner layer of the board body portion; two opposite differential signal holes located on the board body portion, the two differential signal holes being passed sequentially from the differential signal transmission layer to the differential signal line out layer through at least a portion of the core boards and connect the differential signal transmission layer to the differential signal line out layer; and two slotted conductive posts located between the two differential signal holes.
    Type: Application
    Filed: May 11, 2023
    Publication date: September 7, 2023
    Inventors: Changgang YIN, Zhongmin Wei, Bi Yi, Yonghui Ren
  • Patent number: 11696399
    Abstract: A circuit board is disclosed, including a circuit board body and at least one via apparatus provided on the circuit board body. The via apparatus includes a via (101) formed on the circuit board body, a via pad (201) surrounding the via and separately provided from the via, and an electrical conductor (301) electrically connecting the via pad (201) with the via (101).
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: July 4, 2023
    Assignee: ZTE CORPORATION
    Inventors: Changgang Yin, Bi Yi, Zhongmin Wei
  • Patent number: 11457529
    Abstract: Provided are a circuit board, an apparatus and a method for forming a via hole structure. A via hole structure formed on a main body (10) of a circuit board includes a hole (12) enclosed by a conductive layer in the main body (10), the conductive layer constitutes a wall (11) of the hole (12), and a dielectric filling layer (13), which has a dielectric constant smaller than that of the main body (10), is disposed between at least a portion of the wall (11) of the hole (12) and the main body (10), so that the parasitic capacitance of a via hole is decreased, and the impedance of the via hole is increased to become closer to the impedance of a transmission line, thereby effectively improving impedance continuity of a system link.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: September 27, 2022
    Assignee: ZTE CORPORATION
    Inventors: Changgang Yin, Yingxin Wang, Bi Yi, Huazhang Cao
  • Publication number: 20220304152
    Abstract: A circuit board is disclosed, including a circuit board body and at least one via apparatus provided on the circuit board body. The via apparatus includes a via (101) formed on the circuit board body, a via pad (201) surrounding the via and separately provided from the via, and an electrical conductor (301) electrically connecting the via pad (201) with the via (101).
    Type: Application
    Filed: September 15, 2020
    Publication date: September 22, 2022
    Inventors: Changgang YIN, Bi YI, Zhongmin WEI
  • Publication number: 20210392744
    Abstract: Provided are a circuit board, an apparatus and a method for forming a via hole structure. A via hole structure formed on a main body (10) of a circuit board includes a hole (12) enclosed by a conductive layer in the main body (10), the conductive layer constitutes a wall (11) of the hole (12), and a dielectric filling layer (13), which has a dielectric constant smaller than that of the main body (10), is disposed between at least a portion of the wall (11) of the hole (12) and the main body (10), so that the parasitic capacitance of a via hole is decreased, and the impedance of the via hole is increased to become closer to the impedance of a transmission line, thereby effectively improving impedance continuity of a system link.
    Type: Application
    Filed: September 27, 2019
    Publication date: December 16, 2021
    Inventors: Changgang YIN, Yingxin WANG, Bi YI, Huazhang CAO
  • Publication number: 20210092830
    Abstract: Provided is a circuit board, a signal crosstalk suppression method, a storage medium and an electronic device. The circuit board includes: a circuit board body, provided with a signal via-hole structure, a ground via-hole structure and a slotted structure; the signal via-hole structure is configured to transmit a signal by changing a layer, and the ground via-hole structure is configured to return a signal transmitted from the signal via-hole structure; the slotted structure is provided between the signal via-hole structure and the ground via-hole structure, and configured to suppress a signal crosstalk of the signal via-hole structure.
    Type: Application
    Filed: November 27, 2020
    Publication date: March 25, 2021
    Inventors: Changgang YIN, Huazhang CAO, Yingxin WANG