Abstract: Provided is a DRAM including: a substrate, a plurality of chop structures, and a plurality of buried word lines. The plurality of chop structures are located in the substrate. Each of the plurality of chop structures comprises a first portion and a second portion. The first portion is located above the second portion, and a width of the second portion is less than a width of the first portion. The plurality of buried word lines, located at bottoms of a plurality of buried word line trenches. The plurality of buried word line trenches passes through the first portion of the plurality of chop structures and the substrate.

Abstract: A method for forming a semiconductor structure forming a blocking structure in the periphery region over the bottom layer. The method includes covering the middle layer over the bottom layer and the blocking structure. The method includes forming a patterned photoresist layer over the middle layer. The patterned photoresist layer is in the array region and directly over the blocking structure in the periphery region. The method includes transferring the pattern of the patterned photoresist layer to the bottom layer. The pattern of the patterned photoresist layer directly over the blocking structure is not formed in the bottom layer. The first portion of the substrate is in the array region and is an active area array. The second portion of the substrate is in the periphery region and is a guard ring. The third portion of the substrate is in the periphery region and is a periphery structure.

Abstract: A semiconductor structure including a substrate and a monitoring mark is provided. The substrate includes a monitoring region. The monitoring mark is located in the monitoring region. The top-view pattern of the monitoring mark includes a curved line and a recess. The curved line and the recess are opposite to each other, the curved line has a vertex, and the recess has a right-angled corner.

Abstract: A method for forming a semiconductor structure is provided. The method includes: forming a trench in a semiconductor substrate; forming a gate lining layer along a lower portion of the trench; filling a gate electrode layer over the gate lining layer in the lower portion of the trench; forming a first sacrificial layer along a sidewall of an upper portion of the trench; forming a barrier layer along a sidewall of the first sacrificial layer and over a top surface of the gate electrode layer; removing a first portion of the barrier layer along the sidewall of the first sacrificial layer, thereby leaving a second portion of the barrier layer over the top surface of the gate electrode layer; forming a semiconductor layer over the second portion of the barrier layer; removing the first sacrificial layer; and forming a capping layer over the semiconductor layer.

Abstract: A semiconductor structure includes a semiconductor substrate and a gate structure embedded in the semiconductor substrate. The gate structure includes a gate electrode layer, a barrier layer disposed over the gate electrode layer, and a semiconductor layer disposed over the barrier layer. The semiconductor structure also includes an air gap in the semiconductor substrate and exposing the barrier layer and the semiconductor layer.

Abstract: Provided are a semiconductor memory device with guard pillars and a manufacturing method thereof. The semiconductor memory device includes a substrate having a memory region and a periphery region surrounding the memory region, a plurality of bit line structures, a plurality of contacts, a plurality of guard pillars and a plurality of capacitors. The bit line structures are arranged parallel to each other on the substrate in the memory region. The contacts are disposed between the adjacent bit line structures and electrically connected to the substrate. The guard pillars are disposed on the substrate and located between the adjacent bit line structures at the boundary between the memory region and the periphery region. The capacitors are disposed on the plurality of contacts to be electrically connected to the plurality of contacts.

Abstract: A method for forming a semiconductor structure forming a blocking structure in the periphery region over the bottom layer. The method includes covering the middle layer over the bottom layer and the blocking structure. The method includes forming a patterned photoresist layer over the middle layer. The patterned photoresist layer is in the array region and directly over the blocking structure in the periphery region. The method includes transferring the pattern of the patterned photoresist layer to the bottom layer. The pattern of the patterned photoresist layer directly over the blocking structure is not formed in the bottom layer. The first portion of the substrate is in the array region and is an active area array. The second portion of the substrate is in the periphery region and is a guard ring. The third portion of the substrate is in the periphery region and is a periphery structure.

Abstract: A buried word line structure, including a first isolation structure, a buried word line, a first barrier layer, a second barrier layer, a channel layer, and a second isolation structure, is provided. The first isolation structure is disposed in the substrate and has a trench. The buried word line is disposed on a bottom surface of the trench. The first barrier layer is disposed between the buried word line and a sidewall and the bottom surface of the trench. The second barrier layer covers a top surface of the buried word line and includes a main portion and an extension portion. The main portion is located on the buried word line, and the extension portion extends upward from periphery of the main portion. The channel layer is disposed on the first barrier layer and the second barrier layer. The second isolation structure is disposed on the channel layer.

Abstract: Provided is a DRAM including: a substrate, a plurality of chop structures, and a plurality of buried word lines. The plurality of chop structures are located in the substrate. Each of the plurality of chop structures comprises a first portion and a second portion. The first portion is located above the second portion, and a width of the second portion is less than a width of the first portion. The plurality of buried word lines, located at bottoms of a plurality of buried word line trenches. The plurality of buried word line trenches passes through the first portion of the plurality of chop structures and the substrate.

Abstract: Provided is a method of manufacturing a DRAM. A plurality of openings are formed in the substrate. A hard mask is formed on the sidewall of an upper part of each opening. The substrate and the hard mask are partially removed to form a plurality of isolation trenches and to define active regions. Each active region is located between the isolation trenches and remaining portions of the hard mask are located on two sides of each active region. The isolation trenches and the openings are filled with a dielectric layer. The substrate and the dielectric layer are partially removed to form a plurality of buried word line trenches. Each buried word line trench extends along a third direction and passes through the active regions, the openings and the isolation trenches. A plurality of buried word lines are formed in the buried word line trenches.

Abstract: A semiconductor structure includes a semiconductor substrate and a gate structure embedded in the semiconductor substrate. The gate structure includes a gate electrode layer, a barrier layer disposed over the gate electrode layer, and a semiconductor layer disposed over the barrier layer. The semiconductor structure also includes an air gap in the semiconductor substrate and exposing the barrier layer and the semiconductor layer.

Abstract: A buried word line structure, including a first isolation structure, a buried word line, a first barrier layer, a second barrier layer, a channel layer, and a second isolation structure, is provided. The first isolation structure is disposed in the substrate and has a trench. The buried word line is disposed on a bottom surface of the trench. The first barrier layer is disposed between the buried word line and a sidewall and the bottom surface of the trench. The second barrier layer covers a top surface of the buried word line and includes a main portion and an extension portion. The main portion is located on the buried word line, and the extension portion extends upward from periphery of the main portion. The channel layer is disposed on the first barrier layer and the second barrier layer. The second isolation structure is disposed on the channel layer.

Abstract: Provided are a semiconductor memory device with guard pillars and a manufacturing method thereof. The semiconductor memory device includes a substrate having a memory region and a periphery region surrounding the memory region, a plurality of bit line structures, a plurality of contacts, a plurality of guard pillars and a plurality of capacitors. The bit line structures are arranged parallel to each other on the substrate in the memory region. The contacts are disposed between the adjacent bit line structures and electrically connected to the substrate. The guard pillars are disposed on the substrate and located between the adjacent bit line structures at the boundary between the memory region and the periphery region. The capacitors are disposed on the plurality of contacts to be electrically connected to the plurality of contacts.

Abstract: Provided is a method of manufacturing a DRAM. A plurality of openings are formed in the substrate. A hard mask is formed on the sidewall of an upper part of each opening. The substrate and the hard mask are partially removed to form a plurality of isolation trenches and to define active regions. Each active region is located between the isolation trenches and remaining portions of the hard mask are located on two sides of each active region. The isolation trenches and the openings are filled with a dielectric layer. The substrate and the dielectric layer are partially removed to form a plurality of buried word line trenches. Each buried word line trench extends along a third direction and passes through the active regions, the openings and the isolation trenches. A plurality of buried word lines are formed in the buried word line trenches.

Abstract: An apparatus to control lateral motion of a bar moving along a guidance path includes a pair of rotatable hubs each having at least first and second rollers at locations around the perimeter of the hub. The first roller has a first retaining groove of a first radius and the second roller has a second groove of a second radius smaller than the first radius. Each hub further includes at least one guiding element located between the rollers with a guide channel extending in the outer surface. A mounting system allows the hubs to be rotated between first and second positions. In the first position the first rollers oppose each other forming a guideway having a first, enlarged diameter for capturing a free end of an approaching bar. In the second position the second rollers form a second, smaller diameter to match the actual size of the bar.

Abstract: A zoom lens includes a cam roll, straight-forward units, lens groups, a driving unit, a detecting unit and a micro-processing unit. The lens groups moved by the cam roll sequentially varies from a receiving status to a zeroing status, a macro shooting-distance status and a wide shooting-distance status. A datum point of the cam roll corresponds to the zeroing status of the lens groups. The detecting unit includes an impeller, a detecting portion and a photonic sensor. When the photonic sensor detects the datum point of the cam roll, the micro-processing unit determines the position of the datum point of the cam roll and to reset the rotation count of the impeller. When the photonic sensor detects a skew point of the cam roll, the micro-processing unit determines and amends the rotation count of the impeller to be equal to a predetermined value.

Abstract: A zoom lens includes a cam roll, straight-forward units, lens groups, a driving unit, a detecting unit and a micro-processing unit. The lens groups moved by the cam roll sequentially varies from a receiving status to a zeroing status, a macro shooting-distance status and a wide shooting-distance status. A datum point of the cam roll corresponds to the zeroing status of the lens groups. The detecting unit includes an impeller, a detecting portion and a photonic sensor. When the photonic sensor detects the datum point of the cam roll, the micro-processing unit determines the position of the datum point of the cam roll and to reset the rotation count of the impeller. When the photonic sensor detects a skew point of the cam roll, the micro-processing unit determines and amends the rotation count of the impeller to be equal to a predetermined value.

Abstract: An apparatus to control lateral motion of a bar moving along a guidance path includes a pair of rotatable hubs each having at least first and second rollers at locations around the perimeter of the hub. The first roller has a first retaining groove of a first radius and the second roller has a second groove of a second radius smaller than the first radius. Each hub further includes at least one guiding element located between the rollers with a guide channel extending in the outer surface. A mounting system allows the hubs to be rotated between first and second positions. In the first position the first rollers oppose each other forming a guideway having a first, enlarged diameter for capturing a free end of an approaching bar. In the second position the second rollers form a second, smaller diameter to match the actual size of the bar.

Abstract: An adjustable guide, includes two or more mechanisms each having a rotatable retaining element containing a retaining groove with a variable radius in its perimeter surface. The grooves form a guidance path to control the lateral, i.e. non-axial, motion of a long bar moving along a longitudinal axis during a production process. The diameter of the guidance path varies according to the variable radii of the grooves. The guidance path increases in size at a predetermined rate, from a point of origin to an end point on the retaining groove. Rotating the retaining elements causes the diameter of the retaining grooves to change so that the size of the guidance path can be changed to match the diameter of the bar being rolled, size of the guidance path can be changed to fit the diameter of a new bar rolled without having to exchange the guide for a different sized guide, reduce fiction between the bar and the guide, a media, such as compressed air, can be injected between the retaining elements via orifices.