Abstract: When a first interface board receives from an Ethernet switch chip a first Ethernet data packet, once a destination board of the data packet is determined as second interface board logical device of the first interface board encapsulates the data packet into a PCI-E packet that takes a PCI-E memory space address of a board memory in the second interface board as a destination address, so as to enable a PCI-E Endpoint to forward the first PCI-E packet to a forwarding board of a network device; when the first interface board obtains from a board memory a second PCI-E packet coming from a third interface board, logical device of the first interface board parses out a Ethernet data packet from the second PCI-E packet, and transmits the data packet to the Ethernet switch chip, the third interface board and second interface board being the same or not same.

Abstract: In an example, a logic apparatus of an interface board in a network device may generate an Ethernet flow control packet including sending completion information according to Ethernet data packets sent from a sending buffering queue maintained in the interface board. The logic apparatus of the interface board may transmit the Ethernet flow control packet including sending completion information to an Ethernet data channel by taking priority over Ethernet data packets in a receiving buffering queue in an ingress direction. The sending completion information is used by a CPU of a mainboard to maintain a state of the sending buffering queue.

Abstract: When a first interface board receives from an Ethernet switch chip a first Ethernet data packet, once a destination board of the data packet is determined as second interface board logical device of the first interface board encapsulates the data packet into a PCI-E packet that takes a PCI-E memory space address of a board memory in the second interface board as a destination address, so as to enable a PCI-E Endpoint to forward the first PCI-E packet to a forwarding board of a network device; when the first interface board obtains from a board memory a second PCI-E packet coming from a third interface board, logical device of the first interface board parses out a Ethernet data packet from the second PCI-E packet, and transmits the data packet to the Ethernet switch chip, the third interface board and second interface board being the same or not same.

Abstract: In an example, a logic apparatus of an interface board in a network device may generate an Ethernet flow control packet including sending completion information according to Ethernet data packets sent from a sending buffering queue maintained in the interface board. The logic apparatus of the interface board may transmit the Ethernet flow control packet including sending completion information to an Ethernet data channel by taking priority over Ethernet data packets in a receiving buffering queue in an ingress direction. The sending completion information is used by a CPU of a mainboard to maintain a state of the sending buffering queue.