Abstract: A method for manufacturing a memory device includes forming a transistor in a substrate, forming a conductive feature electrically connected to the substrate, forming a via electrically connected to the conductive features, forming a first metal layer electrically connected to the via, forming a magnetic tunnel junction (MTJ) layer stack over the first metal layer, forming a second metal layer over the MTJ layer stack, performing a first etching process on the MTJ layer stack and the second metal layer to form an MTJ structure and a redeposited layer covering sloped sidewalls of the MTJ structure and the second metal layer, performing a second etching process to remove the redeposited layer, and performing a third etching process on the sloped sidewall of the MTJ structure. An etch time of the third etching process is less than an etch time of the first etching process.

Abstract: A method for manufacturing a memory device includes forming a first metal layer over a substrate, forming a magnetic tunnel junction (MTJ) layer stack over the first metal layer, forming a second metal layer over the MTJ layer stack, forming a hard mask layer over the second metal layer, performing a first etching process on the MTJ layer stack to form an MTJ structure and a redeposited layer on a sidewall of the MTJ structure, performing a second etching process to remove the redeposited layer, and performing a third etching process on the sidewall of the MTJ structure.

Abstract: A circular knitting machine with real-time prompt of a knitting machine status. The circular knitting machine includes a base, a cloth rolling machine that rotates relative to the base during knitting operation process, a main camera module fixed on the base, and an auxiliary camera module fixed on the base and disposed close to the main camera module. The main camera module includes a first central axis, and the main camera module takes pictures of a tubular fabric knitted by the circular knitting machine. The auxiliary camera module includes a second central axis intersecting with the first central axis. The auxiliary camera module and the main camera module face a same side of the tubular fabric. A startup timing of the auxiliary camera module only occurs when one of the plurality of connecting rods passes between the main camera module and the tubular fabric.

Abstract: A method for fabricating magnetoresistive random-access memory cells (MRAM) on a substrate is provided. The substrate is formed with a magnetic tunneling junction (MTJ) layer thereon. When the MTJ layer is etched to form the MRAM cells, there may be metal components deposited on a surface of the MRAM cells and between the MRAM cells. The metal components are then removed by chemical reaction. However, the removal of the metal components may form extra substances on the substrate. A further etching process is then performed to remove the extra substances by physical etching.

Abstract: A method for fabricating magnetoresistive random-access memory cells (MRAM) on a substrate is provided. The substrate is formed with a magnetic tunneling junction (MTJ) layer thereon. When the MTJ layer is etched to form the MRAM cells, there may be metal components deposited on a surface of the MRAM cells and between the MRAM cells. The metal components are then removed by chemical reaction. However, the removal of the metal components may form extra substances on the substrate. A further etching process is then performed to remove the extra substances by physical etching.

Abstract: A transistor includes a gate electrode, a gate dielectric layer covering the gate electrode, an active layer covering the gate dielectric layer and including a first metal oxide material, and source/drain electrodes disposed on the active layer and made of a second metal oxide material with an electron concentration of at least about 1018 cm?3. A semiconductor structure and a manufacturing method are also provided.

Abstract: A method for fabricating magnetoresistive random-access memory cells (MRAM) on a substrate is provided. The substrate is formed with a magnetic tunneling junction (MTJ) layer thereon. When the MTJ layer is etched to form the MRAM cells, there may be metal components deposited on a surface of the MRAM cells and between the MRAM cells by chemical reaction. The metal components are then removed by chemical reaction.

Abstract: A transistor includes a gate electrode, a gate dielectric layer covering the gate electrode, an active layer covering the gate dielectric layer and including a first metal oxide material, and source/drain electrodes disposed on the active layer and made of a second metal oxide material with an electron concentration of at least about 1018 cm?3. A semiconductor structure and a manufacturing method are also provided.

Abstract: A method for fabricating magnetoresistive random-access memory cells (MRAM) on a substrate is provided. The substrate is formed with a magnetic tunneling junction (MTJ) layer thereon. When the MTJ layer is etched to form the MRAM cells, there may be metal components deposited on a surface of the MRAM cells and between the MRAM cells by chemical reaction. The metal components are then removed by chemical reaction.

Abstract: Semiconductor structures and methods for manufacturing the same are provided. The method includes forming a bottom electrode layer over a substrate and forming a pinned layer over the bottom electrode layer. The method also includes forming a tunnel barrier layer over the pinned layer and forming a free layer over the tunnel barrier layer. The method also includes patterning the free layer, the tunnel barrier layer, and the pinned layer to form a magnetic tunnel junction (MTJ) stack structure and patterning the bottom electrode layer to form a bottom electrode structure under the MTJ stack structure. In addition, patterning the free layer includes using a first etching gas, and patterning the bottom electrode layer includes using a second etching gas, which is different from the first etching gas.

Abstract: A method for fabricating magnetoresistive random-access memory cells (MRAM) on a substrate is provided. The substrate is formed with a magnetic tunneling junction (MTJ) layer thereon. When the MTJ layer is etched to form the MRAM cells, there may be metal components deposited on a surface of the MRAM cells and between the MRAM cells. The metal components are then removed by chemical reaction. However, the removal of the metal components may form extra substances on the substrate. A further etching process is then performed to remove the extra substances by physical etching.

Abstract: A method for fabricating magnetoresistive random-access memory cells (MRAM) on a substrate is provided. The substrate is formed with a magnetic tunneling junction (MTJ) layer thereon. When the MTJ layer is etched to form the MRAM cells, there may be metal components deposited on a surface of the MRAM cells and between the MRAM cells. The metal components are then removed by chemical reaction. However, the removal of the metal components may form extra substances on the substrate. A further etching process is then performed to remove the extra substances by physical etching.

Abstract: A method for manufacturing a memory device includes forming a first metal layer over a substrate, forming a magnetic tunnel junction (MTJ) layer stack over the first metal layer, forming a second metal layer over the MTJ layer stack, forming a hard mask layer over the second metal layer, performing a first etching process on the MTJ layer stack to form an MTJ structure and a redeposited layer on a sidewall of the MTJ structure, performing a second etching process to remove the redeposited layer, and performing a third etching process on the sidewall of the MTJ structure.

Abstract: A transistor includes a gate electrode, a gate dielectric layer covering the gate electrode, an active layer covering the gate dielectric layer and including a first metal oxide material, and source/drain electrodes disposed on the active layer and made of a second metal oxide material with an electron concentration of at least about 1018 cm?3. A semiconductor structure and a manufacturing method are also provided.

Abstract: A method for fabricating magnetoresistive random-access memory cells (MRAM) on a substrate is provided. The substrate is formed with a magnetic tunneling junction (MTJ) layer thereon. When the MTJ layer is etched to form the MRAM cells, there may be metal components deposited on a surface of the MRAM cells and between the MRAM cells by chemical reaction. The metal components are then removed by chemical reaction.

Abstract: A method for fabricating magnetoresistive random-access memory cells (MRAM) on a substrate is provided. The substrate is formed with a magnetic tunneling junction (MTJ) layer thereon. When the MTJ layer is etched to form the MRAM cells, there may be metal components deposited on a surface of the MRAM cells and between the MRAM cells. The metal components are then removed by chemical reaction. However, the removal of the metal components may form extra substances on the substrate. A further etching process is then performed to remove the extra substances by physical etching.

Abstract: Semiconductor structures and methods for manufacturing the same are provided. The method includes forming a bottom electrode layer over a substrate and forming a pinned layer over the bottom electrode layer. The method also includes forming a tunnel barrier layer over the pinned layer and forming a free layer over the tunnel barrier layer. The method also includes patterning the free layer, the tunnel barrier layer, and the pinned layer to form a magnetic tunnel junction (MTJ) stack structure and patterning the bottom electrode layer to form a bottom electrode structure under the MTJ stack structure. In addition, patterning the free layer includes using a first etching gas, and patterning the bottom electrode layer includes using a second etching gas, which is different from the first etching gas.

Abstract: An integrated circuit includes a substrate, a dielectric layer over the substrate, a plurality of cells, a plurality of spacers and a plurality of conductive particles. Each of the cells includes a bottom portion in the dielectric layer and an upper portion protruding from the dielectric layer. The spacers are disposed over the dielectric layer and partially cover the upper portions of the cells, respectively. The spacers are disconnected from each other, and cover a first area of the dielectric layer and expose a second area of the dielectric layer. The conductive particles are disposed between the first area of the dielectric layer and the spacers.

Abstract: An integrated circuit includes a substrate, a dielectric layer over the substrate, a plurality of cells, a plurality of spacers and a plurality of conductive particles. Each of the cells includes a bottom portion in the dielectric layer and an upper portion protruding from the dielectric layer. The spacers are disposed over the dielectric layer and partially cover the upper portions of the cells, respectively. The spacers are disconnected from each other, and cover a first area of the dielectric layer and expose a second area of the dielectric layer. The conductive particles are disposed between the first area of the dielectric layer and the spacers.

Abstract: A disk device includes a frame defining a tray housing and a rail housing communicating with the tray housing; a tray releasably received in the tray housing in the frame; and a rail movably incorporated in the rail housing. The rail includes a slide for drawing the tray out of the frame, and a latching member for detachably engaging with the tray. The slide is movable along a first direction that exposes from the rail housing, the latching member is movable along a second direction substantially perpendicular to the first direction between a first position where the latching member is engaged with the tray and a second position where the latching member is disengaged with the tray.