Abstract: A terminal resistance circuit, a chip and a chip communication device are provided. The terminal resistance circuit can be used for a high-speed differential I/O pair and includes two resistance circuits and a control circuit. An end of the two resistance circuits connected in series is connected to a first interface and another end is connected to a second interface. A conductor wire connected between the two resistance circuits has a target node thereon. The two resistance circuits are symmetrically arranged relative to the target node. The control circuit is connected to the two resistance circuits individually and used to control the two resistance circuits each to be in a turn-off state during powering-on of the chip. An abnormal operation caused by a short circuit between two interfaces of a I/O pair during the powering-on of the chip is avoided and the working stability of the chip is improved.

Abstract: Provided are a power regulation circuit and method for a chip, and a power supply circuit for a circuit. The power regulation circuit includes an LC circuit and an LC correction circuit. One terminal of the LC circuit is electrically connected to a positive pole of a chip and a positive electrode of a power supply. The other terminal of the LC circuit is electrically connected to a negative pole of the chip and a negative pole of the power supply. The LC correction circuit is electrically connected to the chip and the LC circuit, and is used to regulate a working parameter of the LC circuit according to the current working mode of the chip.

Abstract: Provided are a digital-to-analog conversion circuit and method. The digital-to-analog conversion circuit includes a conversion unit and a first regulating unit. The conversion unit includes a first code value receiving terminal used to receive a first code value, and the conversion unit is used to convert the first code value into an analog signal. The first regulating unit includes a second code value receiving terminal used to receive a second code value. A signal input terminal of the first regulating unit is connected to a signal output terminal of the conversion unit. The first regulating unit is used to acquire a first analog regulation signal according to the second code value, and regulate, by using the first analog regulation signal, an analog signal transmitted by the conversion unit.

Abstract: A terminal resistance circuit, a chip and a chip communication device are provided. The terminal resistance circuit can be used for a high-speed differential I/O pair and includes two resistance circuits and a control circuit. An end of the two resistance circuits connected in series is connected to a first interface and another end is connected to a second interface. A conductor wire connected between the two resistance circuits has a target node thereon. The two resistance circuits are symmetrically arranged relative to the target node. The control circuit is connected to the two resistance circuits individually and used to control the two resistance circuits each to be in a turn-off state during powering-on of the chip. An abnormal operation caused by a short circuit between two interfaces of a I/O pair during the powering-on of the chip is avoided and the working stability of the chip is improved.