Abstract: The present invention provides a CMOS gate driving circuit, comprising a plurality of shift register units which are cascade connected, and the shift register unit of the nth stage comprises: a forward-backward scan module, a latch module (200) electrically coupled to the forward-backward scan module and an output module (400) electrically coupled to the latch module; the forward-backward scan module comprises: a first module (100) and a second module (300), and the first module (100) is a transmission module in forward scan and a pull-down module in backward scan; the second module (300) is a pull-down module in forward scan and a transmission module in backward scan; both the first module (100) and the second module (300) comprise a NAND gate, which can achieve forward-backward scan for ensuring the stability of the GOA function and the smooth output of the scan voltage signal to raise the stage transfer efficiency and to effectively reduce the sequence delay of the stage transfer; meanwhile, the multiple f

Abstract: The present invention relates to a GOA circuit for tablet display and a display device. The GOA circuit comprises cascaded plurality of GOA units, the GOA unit comprises a pull-up control part 400 and a transfer part 500; the transfer part 500 comprises a first thin film transistor T22, the gate thereof is connected with the gate signal point Q(n), the drain and the source are respectively input the clock signal CK(n) and output the turn-on signal ST(n); the pull-up control part comprises: a second thin film transistor T11, the gate thereof is input the turn-on signal ST(n?2), the drain and the source are respectively connected with the horizontal scan line G(n?2) and the gate signal point Q(n); a third tin film transistor T12, the gate thereof is connected with the horizontal scan line G(n?1), the drain and the source are respectively connected with the horizontal scan line G(n?1) and the gate signal point Q(n). The present invention also provides a related display device.

Abstract: The present invention provides a CMOS gate driving circuit, comprising a plurality of shift register units which are cascade connected, and the shift register unit of the nth stage comprises: a forward-backward scan module, a latch module (200) electrically coupled to the forward-backward scan module and an output module (400) electrically coupled to the latch module; the forward-backward scan module comprises: a first module (100) and a second module (300), and the first module (100) is a transmission module in forward scan and a pull-down module in backward scan; the second module (300) is a pull-down module in forward scan and a transmission module in backward scan; both the first module (100) and the second module (300) comprise a NAND gate, which can achieve forward-backward scan for ensuring the stability of the GOA function and the smooth output of the scan voltage signal to raise the stage transfer efficiency and to effectively reduce the sequence delay of the stage transfer; meanwhile, the multiple f

Abstract: The present invention relates to a GOA circuit for tablet display and a display device. The GOA circuit comprises cascaded plurality of GOA units, the GOA unit comprises a pull-up control part 400 and a transfer part 500; the transfer part 500 comprises a first thin film transistor T22, the gate thereof is connected with the gate signal point Q(n), the drain and the source are respectively input the clock signal CK(n) and output the turn-on signal ST(n); the pull-up control part comprises: a second thin film transistor T11, the gate thereof is input the turn-on signal ST(n?2), the drain and the source are respectively connected with the horizontal scan line G(n?2) and the gate signal point Q(n); a third tin film transistor T12, the gate thereof is connected with the horizontal scan line G(n?1), the drain and the source are respectively connected with the horizontal scan line G(n?1) and the gate signal point Q(n). The present invention also provides a related display device.

Abstract: The present invention relates to a GOA circuit for liquid crystal displaying and a display device. The GOA circuit includes a plurality of cascaded GOA units and the nth-stage GOA unit includes a pull-up part (100), a key pull-down part (200), a pull-down holding part (300), a pull-up control part (400), and a boost capacitor (Cb). In operation, a nth-stage clock signal (CK(n)) and first and second clock signals (LC1 and LC2) are inputted. The frequencies of the first clock signal (LC1) and the second clock signal (LC2) are lower than the nth clock signal (CK(n)). The first clock signal (LC1) charging a first circuit point (P) and the second clock signal (LC2) charging a second circuit point (K) are alternately carried out. The present invention also provides a corresponding display device.

Abstract: The present invention relates to a GOA circuit for liquid crystal displaying and a display device. The GOA circuit includes a plurality of cascaded GOA units and the nth-stage GOA unit includes a pull-up part (100), a key pull-down part (200), a pull-down holding part (300), a pull-up control part (400), and a boost capacitor (Cb). In operation, a nth-stage clock signal (CK(n)) and first and second clock signals (LC1 and LC2) are inputted. The frequencies of the first clock signal (LC1) and the second clock signal (LC2) are lower than the nth clock signal (CK(n)). The first clock signal (LC1) charging a first circuit point (P) and the second clock signal (LC2) charging a second circuit point (K) are alternately carried out. The present invention also provides a corresponding display device.

Abstract: The present invention provides a gate driver on array (GOA) circuit and a display panel with the GOA circuit. The driver circuit includes multiple stages of gate driver units and multiple stages of supplementary gate driver units connected in cascade, in which the nth stage gate driver unit includes a driving unit (42) and a pull-down unit (44) and the mth stage supplementary gate driver unit includes a supplementary driving unit (52) and a supplementary pull-down unit (54).

Abstract: The present invention provides a gate driver on array (GOA) circuit and a display panel with the GOA circuit. The driver circuit includes multiple stages of gate driver units and multiple stages of supplementary gate driver units connected in cascade, in which the nth stage gate driver unit includes a driving unit (42) and a pull-down unit (44) and the mth stage supplementary gate driver unit includes a supplementary driving unit (52) and a supplementary pull-down unit (54).