Abstract: A source driver includes an output buffer for outputting a driving signal; a first current path coupled between the output buffer and a data line; and a second current path coupled in parallel to the first current path. During a first driving period, the output buffer utilizes both the first current path and the second current path to drive the data line. During a second driving period, the output buffer utilizes only the first current path to transmit the driving signal so as to improve the stability of the source driver.

Abstract: A source driver includes an output buffer for outputting a driving signal; a first current path coupled between the output buffer and a data line; and a second current path coupled in parallel to the first current path. During a first driving period, the output buffer utilizes both the first current path and the second current path to drive the data line. During a second driving period, the output buffer utilizes only the first current path to transmit the driving signal so as to improve the stability of the source driver.

Abstract: A source driver includes four output switches, two resistors, and a charge-sharing switch. The first output switch and the first resistor are coupled in series to a first output channel of the source driver. The second output switch and the second resistor are coupled in series to a second output channel of the source driver. The third output switch is coupled in parallel to the first output switch. The fourth output switch is coupled in parallel to the second output switch. The charge-sharing switch is coupled between the first resistor and the second resistor. The third output switch and the fourth output switch are controlled to adjust the resistance of the output current path of the source driver.

Abstract: A driving apparatus used for a display is disclosed. The driving apparatus includes a voltage divider, a first and a second digital to analog converter, and a first voltage amplifier. The voltage divider divides a first voltage to generate a positive polarity gamma voltage and a negative polarity gamma voltage. The first digital to analog converter converts a first gray level signal to a first analog gray level signal. The second digital to analog converter converts a second gray level signal to a second analog gray level signal. The first voltage amplifier receives one of the first or the second analog gray level signal. Wherein, the voltage divider, the first and the second digital to analog converters receive a first voltage as an operating voltage, and the first voltage amplifier receives a second voltage as an operating voltage. Moreover, the second voltage is larger than the first voltage.

Abstract: A source driver includes four output switches, two resistors, and a charge-sharing switch. The first output switch and the first resistor are coupled in series to a first output channel of the source driver. The second output switch and the second resistor are coupled in series to a second output channel of the source driver. The third output switch is coupled in parallel to the first output switch. The fourth output switch is coupled in parallel to the second output switch. The charge-sharing switch is coupled between the first resistor and the second resistor. The third output switch and the fourth output switch are controlled to adjust the resistance of the output current path of the source driver.

Abstract: The present invention discloses a formula for fabricating skin treatment product, wherein the formula comprises at least one pectin enzyme and at least one cellulose enzyme. The formula is used to mix with an organic mixture to fabricate the desired skin treatment product, and the organic mixture comprises extract or artifact of nature product. Additionally, this invention also discloses a method for fabricating skin treatment product by use of the above-mentioned formula.

Abstract: A method for testing I/O ports of a computer motherboard under test. A non-volatile memory on the computer motherboard under test is provided with a test code for initializing the computer motherboard and testing its I/O ports, in which the test code includes a plurality of test routines corresponding to the I/O ports to be tested. Upon power-up or reboot, the computer motherboard under test is booted from the test code in the non-volatile memory. One of the I/O ports is selected from an interactive display menu, and then a CPU on the computer motherboard under test executes the corresponding test routine for the selected I/O port to test it. If there is an abnormal signal pin in the selected I/O port, a failure message is displayed to indicate which signal pin of the selected I/O port is not operating correctly. Otherwise, a pass message is displayed.

Abstract: A method for testing I/O ports of a computer motherboard under test. A non-volatile memory on the computer motherboard under test is provided with a test code for initializing the computer motherboard and testing its I/O ports, in which the test code includes a plurality of test routines corresponding to the I/O ports to be tested. Upon power-up or reboot, the computer motherboard under test is booted from the test code in the non-volatile memory. One of the I/O ports is selected from an interactive display menu, and then a CPU on the computer motherboard under test executes the corresponding test routine for the selected I/O port to test it. If there is an abnormal signal pin in the selected I/O port, a failure message is displayed to indicate which signal pin of the selected I/O port is not operating correctly. Otherwise, a pass message is displayed.