Patents by Inventor Chao-Chen Chen

Chao-Chen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110117283
    Abstract: A spray coating system is provided. The spray coating system includes a spin support for supporting and spinning the substrate; a sprayer for applying a material to an upper surface of the substrate; a cup surrounding a lateral and lower region of the spin support, wherein an opening is located in an upper central region of the cup; an air supply mechanism for supplying air flows to a back surface of the substrate to prevent the material from adhering thereto, and an exhaust zone disposed below a slanted surface of the cup for exhausting the air flow and material.
    Type: Application
    Filed: November 13, 2009
    Publication date: May 19, 2011
    Inventors: Chia-Hao HSUEH, Yuan-Chun CHAO, Kuo-Hsing TENG, Chao-Chen CHEN
  • Patent number: 7737538
    Abstract: A semiconductor package. The semiconductor package of the invention comprises: a substrate comprising at least one exposed area with photosensitive devices; a cover for isolating the exposed area from the external atmosphere, wherein one of either the substrate or the cover is a base, and the other is a top structure; and a dam formed on the base to form a cavity, wherein the top of the dam has a recess, the dam is attached the top structure by an adhesive, and the cavity corresponds to the exposed area.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: June 15, 2010
    Assignee: VisEra Technologies Company Limited
    Inventors: Chao-Chen Chen, Lin-Gi Yang, Chia-Chi Chou, Shih-Chieh Teng
  • Publication number: 20090121303
    Abstract: A semiconductor package. The semiconductor package of the invention comprises: a substrate comprising at least one exposed area with photosensitive devices; a cover for isolating the exposed area from the external atmosphere, wherein one of either the substrate or the cover is a base, and the other is a top structure; and a dam formed on the base to form a cavity, wherein the top of the dam has a recess, the dam is attached the top structure by an adhesive, and the cavity corresponds to the exposed area.
    Type: Application
    Filed: November 8, 2007
    Publication date: May 14, 2009
    Inventors: Chao-Chen Chen, Lin-Gi Yang, Chia-Chi Chou, Shih-Chieh Teng
  • Publication number: 20090104545
    Abstract: Embodiments disclose a method for fabricating a color filter, comprising: providing a substrate; forming a planarization layer on the substrate; forming a first color layer over the planarization layer; exposing and developing the first color layer to form a patterned first color filter unit over the planarization layer; forming a second color layer over the planarization layer and the patterned first color filter unit; exposing and developing the second color layer to form a patterned second color filter unit over the planarization layer; forming a third color layer over the planarization layer and the patterned first and second color filter units; and etching back or chemical mechanical polishing (CMP) the third color layer to form a patterned third color filter unit over the planarization layer.
    Type: Application
    Filed: October 22, 2007
    Publication date: April 23, 2009
    Inventors: Chao-Chen Chen, Joseph Lai, Cheng-Hong Yeh
  • Patent number: 7247939
    Abstract: A method for forming a metal filled semiconductor feature with improved structural stability including a semiconductor wafer having an anisotropically etched opening formed through a plurality of dielectric insulating layers revealing a first etching resistant layer overlying a conductive area; a plurality of dielectric insulating layers sequentially stacked to have alternating etching rates to a preferential etching process; subjecting the anisotropically etched opening to the preferential etching process whereby the sidewalls of the anisotropically etched opening are preferentially etched to produce etched dielectric insulating layers to form roughened sidewall surfaces; anisotropically etching through the etching resistant layer to reveal the conductive area; and, filling the anisotropically etched opening with a metal to form a metal filled semiconductor feature.
    Type: Grant
    Filed: April 1, 2003
    Date of Patent: July 24, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Chen Huang, Chao-Chen Chen
  • Publication number: 20060246727
    Abstract: An integrated apparatus comprises a plasma etching station, a wet cleaning station, a de-gassing station, a thin film deposition station, and a wafer transfer mechanism to automatically index wafers between the stations in a predetermined processing order.
    Type: Application
    Filed: April 27, 2005
    Publication date: November 2, 2006
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Hua Hsieh, Chao-Chen Chen, Shau-Lin Shue, Hun-Jan Tao, Mong-Song Liang
  • Publication number: 20050218476
    Abstract: A new process flow is provided for the creation of a fuse contact and a bond pad. The invention starts with a semiconductor substrate over the surface of which is provided top level metal and fuse metal in the surface of a layer of insulation deposited over the surface of the substrate. A first etch stop layer is deposited over the surface of the layer of insulation over which a first passivation layer is deposited, an opening is created through these layers exposing the top level metal. A metal plug is created overlying the exposed surface of the top level metal. A stack of a patterned and etched hard mask layers, having been deposited at part of the creation of the metal plug and overlying a layer of metal plug material, remains in place over the surface of the created metal plug.
    Type: Application
    Filed: May 18, 2005
    Publication date: October 6, 2005
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tze-Liang Lee, Chao-Chen Chen
  • Patent number: 6911386
    Abstract: A new process flow is provided for the creation of a fuse contact and a bond pad. The invention starts with a semiconductor substrate over the surface of which is provided top level metal and fuse metal in the surface of a layer of insulation deposited over the surface of the substrate. A first etch stop layer is deposited over the surface of the layer of insulation over which a first passivation layer is deposited, an opening is created through these layers exposing the top level metal. A metal plug is created overlying the exposed surface of the top level metal. A stack of a patterned and etched hard mask layers, having been deposited at part of the creation of the metal plug and overlying a layer of metal plug material, remains in place over the surface of the created metal plug.
    Type: Grant
    Filed: June 21, 2002
    Date of Patent: June 28, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tze-Liang Lee, Chao-Chen Chen
  • Publication number: 20040198057
    Abstract: A method for forming a metal filled semiconductor feature with improved structural stability including a semiconductor wafer having an anisotropically etched opening formed through a plurality of dielectric insulating layers revealing a first etching resistant layer overlying a conductive area; a plurality of dielectric insulating layers sequentially stacked to have alternating etching rates to a preferential etching process; subjecting the anisotropically etched opening to the preferential etching process whereby the sidewalls of the anisotropically etched opening are preferentially etched to produce etched dielectric insulating layers to form roughened sidewall surfaces; anisotropically etching through the etching resistant layer to reveal the conductive area; and, filling the anisotropically etched opening with a metal to form a metal filled semiconductor feature.
    Type: Application
    Filed: April 1, 2003
    Publication date: October 7, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Chen Huang, Chao-Chen Chen
  • Patent number: 6458650
    Abstract: A new method is provided for the creation of an opening over which the second electrode of a MIM capacitor is to be deposited. The first electrode of the MIM is created in a first layer of Fluorine doped Silicon dioxide (SiO2) Glass (FSG) . A layer of insulation comprising silicon nitride is deposited over the surface of the first electrode. A second layer of Fluorine doped Silicon dioxide (SiO2) Glass (FSG) is deposited over the surface of the layer of silicon nitride, an etch stop layer of silicon nitride is deposited over the surface of the second layer of FSG. The layers of etch stop and the second layer of FSG are patterned and etched using a dry etch, stopping on the layer-of insulation and exposing the surface of the layer of insulation. Next-and of critical importance to the invention is a step of photoresist ashing and oxidation of the surface of the layer of silicon nitride.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: October 1, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yi-Chen Huang, Li-Chih Chao, Chao-Chen Chen
  • Publication number: 20010049467
    Abstract: Described is a surgical instrument and method for treating female urinary stress incontinence. The instrument includes a curved needle-like element defining in part a curved shaft having a distal end and a proximal end. The diameter of the needle decreases from the proximal end to the distal end, and the needle terminates in a blunt tip. A tape attaches to the needle for implanting into the lower abdomen of a female to provide support to the urethra. The tape may be made from synthetic and natural materials. The needle and tape may also be modified to allow the surgeon to attach and detach the tape during the surgical operation.
    Type: Application
    Filed: June 18, 2001
    Publication date: December 6, 2001
    Inventors: Jorn Lehe, Chao-Chen Chen, Brian H. Luscombe
  • Patent number: 6273852
    Abstract: A is a surgical instrument and method for treating female urinary stress incontinence. The instrument includes a curved needle-like element defining in part a curved shaft having a distal end and a proximal end. The diameter of the needle decreases from the proximal end to the distal end, and the needle terminates in a blunt tip. A tape attaches to the needle for implanting into the lower abdomen of a female to provide support to the urethra. The tape may be made from synthetic and natural materials. The needle and tape may also be modified to allow the surgeon to attach and detach the tape during the surgical operation.
    Type: Grant
    Filed: March 9, 2000
    Date of Patent: August 14, 2001
    Assignee: Ethicon, Inc.
    Inventors: Jorn Lehe, Chao-Chen Chen, Brian H. Luscombe
  • Patent number: 6137088
    Abstract: A method and apparatus for curing a photoresist that is deposited in liquid form and spun on a surface of a wafer leaving a thin film to be cured. This invention teaches methods for curing the resist with improved thickness control using front side heating.
    Type: Grant
    Filed: October 5, 1998
    Date of Patent: October 24, 2000
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Chao-Chen Chen, Wei-Kay Chiu
  • Patent number: 5849582
    Abstract: A method and apparatus for curing a photoresist that is deposited in liquid form and spun on a surface of a wafer leaving a thin film to be cured. This invention teaches methods for curing the resist with improved thickness control using front side heating.
    Type: Grant
    Filed: May 1, 1997
    Date of Patent: December 15, 1998
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Chen Chen, Wei-Kay Chiu