Abstract: Provided are an epitaxial structure and a semiconductor chip applying same. The epitaxial structure comprises a quantum well structure, a P-type contact layer, and an electrode layer, which are stacked in sequence; the P-type contact layer comprises a first step part and a second step part that are disposed in a step shape, the second step part being closer to the quantum well structure relative to the first step part; the first step part and the second step part are filled with a first insulation part. By means of the described method, the anti-catastrophic optical mirror damage value of a semiconductor chip can be effectively improved.

Abstract: Disclosed in the present invention are a laser chip and a preparation method therefor.

Abstract: The present application provides an alignment method for backside photolithography process of the wafer, the alignment method includes: cutting the wafer, and using at least two edges formed by cutting as the first alignment mark; bonding the front side of the wafer to the wafer pad to form a composite wafer; aligning the first alignment mark with the corresponding second alignment mark on the photomask for backside photolithography. This method is not limited by wafer thickness and material, and reduces the secondary input of the photolithography equipment; meanwhile, the probability of fragments of thin wafers in the photolithography process can be reduced, and the yield of the product is effectively improved.

Abstract: A semiconductor laser and a fabrication method therefor. The method comprises: providing a heat sink motherboard, and cutting the heat sink motherboard to form a plurality of heat sink substrates (300) (S11); providing an epitaxial wafer (200) (S12); bonding the plurality of heat sink substrates (300) to the epitaxial wafer (200) in an array to form a plurality of gaps parallel to the direction of resonant cavities (210) and perpendicular to the direction of the resonant cavities (210) (S13); dividing the epitaxial wafer (200) along the gaps to obtain a plurality of laser chips (S14); and stacking the plurality of laser chips, and coating the plurality of stacked laser chips to form a plurality of semiconductor lasers (S15).

Abstract: Disclosed are a manufacturing method for a laser chip and a laser chip. The manufacturing method comprises: step S1, forming a first electroplating substrate on an epitaxial layer; step S2, forming an organic pattern layer on the first electroplating substrate, wherein the pattern layer defines a hollowed-out area and a part of the first electroplating substrate is exposed to the pattern layer by means of the hollowed-out area; step S3, forming a first metal coating on the first electroplating substrate, wherein the first metal coating completely covers the pattern layer and the part of the first electroplating substrate not covered by the pattern layer; and step S4, removing the pattern layer to have a hollow channel formed between the first metal coating and the first electroplating substrate, wherein the channel is provided with at least one inlet and at least one outlet running through the first metal coating.

Abstract: A semiconductor laser chip and a preparation method therefor, the method comprising: providing an epitaxial wafer (100), the epitaxial wafer (100) comprising a plurality of resonant cavities (110) arranged in parallel; providing a heat sink substrate (200); attaching the epitaxial wafer (100) to the heat sink substrate (200) so as to form a first chip semi-finished product (10); performing first division on the first chip semi-finished product (10) in the direction perpendicular to the resonant cavities (110) so as to divide the first chip semi-finished product (10) into a plurality of second chip semi-finished products (20); and performing second division on the second chip semi-finished products (20) in the direction parallel to the resonant cavities (110) so as to divide the second chip semi-finished products (20) into a plurality of semiconductor laser chips (30) such that the semiconductor laser chips (30) comprise at least one laser bar.

Abstract: A method for fabricating a light emitting diode die includes the steps of providing a carrier substrate and forming an epitaxial structure on the carrier substrate including a first type semiconductor layer, a multiple quantum well (MQW) layer on the first type semiconductor layer configured to emit light, and a second type semiconductor layer on the multiple quantum well (MQW) layer. The method also includes the steps of forming a plurality of trenches through the epitaxial structure, forming a reflector layer on the second type semiconductor layer, forming a seed layer on the reflector layer and in the trenches, and forming a substrate on the seed layer having an area configured to protect the epitaxial structure.

Abstract: The present invention provides a light emitting diode, which comprises a first LED die, a second LED die, and a dummy LED die, wherein the second LED die is disposed between the first LED die and the dummy LED die, and each die comprises a first semi-conductive layer, a second semi-conductive layer, and a multiple quantum well layer disposed between the first and the second semi-conductive layers. The first semi-conductive layer of the first LED die is coupled to the second semi-conductive layer of the second LED die, and the first semi-conductive layer of the second LED die is coupled to the first and second semi-conductive layers of the dummy LED die.

Abstract: The present invention provides a light emitting diode, which comprises a first LED die and a second LED die, each die comprising a first semi-conductive layer, a second semi-conductive layer, and a multiple quantum well layer disposed between the first and the second semi-conductive layers, wherein the first semi-conductive layer of the first LED die is coupled to the second semi-conductive layer of the second LED die so as to form a serially connected structure whereby the consuming current and heat generation of the light emitting diode are lowered so that the size of heat dissipating device for the light emitting diode can be reduced and illumination of the light emitting diode can be enhanced.

Abstract: A vertical light emitting diode (VLED) die includes an epitaxial structure having a first-type confinement layer, an active layer on the first-type confinement layer configured as a multiple quantum well (MQW) configured to emit light, and a second-type confinement layer having a roughened surface. In a first embodiment, the roughened surface includes a pattern of holes with a depth (d) in a major surface thereof surrounded by a pattern of protuberances with a height (h) on the major surface. In a second embodiment, the roughened surface includes a pattern of primary protuberances surrounded by a pattern of secondary protuberances.

Abstract: A vertical light emitting diode (VLED) die includes an epitaxial structure having a first-type confinement layer, an active layer on the first-type confinement layer configured as a multiple quantum well (MQW) configured to emit light, and a second-type confinement layer having a roughened surface. In a first embodiment, the roughened surface includes a pattern of holes with a depth (d) in a major surface thereof surrounded by a pattern of protuberances with a height (h) on the major surface. In a second embodiment, the roughened surface includes a pattern of primary protuberances surrounded by a pattern of secondary protuberances.

Abstract: A method for fabricating a vertical light-emitting diode (VLED) structure includes the steps of providing a carrier substrate, and forming a semiconductor structure on the carrier substrate having a p-type confinement layer, a multiple quantum well (MQW) layer in electrical contact with the p-type confinement layer configured to emit electromagnetic radiation, and an n-type confinement layer in electrical contact with the multiple quantum well (MQW) layer. The method also includes the steps of removing the carrier substrate using a laser pulse to expose an inverted surface of the n-type confinement layer, and forming a metal contact on the surface of the n-type confinement layer.

Abstract: A method for fabricating a light emitting diode die includes the steps of providing a carrier substrate and forming an epitaxial structure on the carrier substrate including a first type semiconductor layer, a multiple quantum well (MQW) layer on the first type semiconductor layer configured to emit light, and a second type semiconductor layer on the multiple quantum well (MQW) layer. The method also includes the steps of forming a plurality of trenches through the epitaxial structure, forming a reflector layer on the second type semiconductor layer, forming a seed layer on the reflector layer and in the trenches, and forming a substrate on the seed layer having an area configured to protect the epitaxial structure.

Abstract: Techniques for fabricating metal devices, such as vertical light-emitting diode (VLED) devices, power devices, laser diodes, and vertical cavity surface emitting laser devices, are provided. Devices produced accordingly may benefit from greater yields and enhanced performance over conventional metal devices, such as higher brightness of the light-emitting diode and increased thermal conductivity. Moreover, the invention discloses techniques in the fabrication arts that are applicable to GaN-based electronic devices in cases where there is a high heat dissipation rate of the metal devices that have an original non-(or low) thermally conductive and/or non-(or low) electrically conductive carrier substrate that has been removed.

Abstract: A method for fabricating a vertical light-emitting diode (VLED) structure includes the steps of providing a carrier substrate, and forming a semiconductor structure on the carrier substrate having a p-type confinement layer, a multiple quantum well (MQW) layer in electrical contact with the p-type confinement layer configured to emit electromagnetic radiation, and an n-type confinement layer in electrical contact with the multiple quantum well (MQW) layer. The method also includes the steps of removing the carrier substrate using a laser pulse to expose an inverted surface of the n-type confinement layer, and forming a metal contact on the surface of the n-type confinement layer.

Abstract: Methods for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current-guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a substrate) may be provided. For some embodiments, both a current-guiding structure and second current path may be provided.

Abstract: Techniques for fabricating contacts on inverted configuration surfaces of GaN layers of semiconductor devices are provided. An n-doped GaN layer may be formed with a surface exposed by removing a substrate on which the n-doped GaN layer was formed. The crystal structure of such a surface may have a significantly different configuration than the surface of an as-deposited p-doped GaN layer.

Abstract: A light emitting diode (LED) die includes a first substrate having a first surface and an opposing second surface; a second substrate on the second surface of the first substrate; a p-type semiconductor layer on the first surface of the first substrate; a multiple quantum well (MQW) layer on the p-type semiconductor layer configured to emit light; and an n-type semiconductor layer on the multiple quantum well (MQW) layer.

Abstract: The present invention provides a light emitting diode, which comprises a first LED die, a second LED die, and a dummy LED die, wherein the second LED die is disposed between the first LED die and the dummy LED die, and each die comprises a first semi-conductive layer, a second semi-conductive layer, and a multiple quantum well layer disposed between the first and the second semi-conductive layers. The first semi-conductive layer of the first LED die is coupled to the second semi-conductive layer of the second LED die, and the first semi-conductive layer of the second LED die is coupled to the first and second semi-conductive layers of the dummy LED die.

Abstract: The present invention provides a light emitting diode, which comprises a first LED die and a second LED die, each die comprising a first semi-conductive layer, a second semi-conductive layer, and a multiple quantum well layer disposed between the first and the second semi-conductive layers, wherein the first semi-conductive layer of the first LED die is coupled to the second semi-conductive layer of the second LED die so as to form a serially connected structure whereby the consuming current and heat generation of the light emitting diode are lowered so that the size of heat dissipating device for the light emitting diode can be reduced and illumination of the light emitting diode can be enhanced.