Patents by Inventor Chao Cheng

Chao Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250151255
    Abstract: A capacitor includes cup-shaped lower electrodes disposed on a substrate, a capacitor dielectric layer conformally covering inner surfaces and outer surfaces of the cup-shaped lower electrodes, and a support layer disposed between outer surfaces of the cup-shaped lower electrodes to connect the cup-shaped lower electrodes. The capacitor further includes an annealed oxide layer, which is interposed between the inner surfaces of the cup-shaped lower electrodes and the capacitor dielectric layer, and is also interposed between a portion of the outer surfaces of the cup-shaped lower electrodes and the capacitor dielectric layer. A method for forming the capacitor is also provided.
    Type: Application
    Filed: January 10, 2025
    Publication date: May 8, 2025
    Inventors: Yu-Ping HSIAO, Cheol-Soo PARK, Chun-Hung CHENG, Wei-Chieh CHUANG, Wei-Chao CHOU, Yen-Min JUAN
  • Publication number: 20250151147
    Abstract: In a method, a first node receives a plurality of pieces of first information from a plurality of second nodes, where each of the plurality of pieces of first information indicates a service type of a set to which a second node that sends the first information belongs. The first node determines a target set from sets to which the plurality of second nodes belong, and sends a connection request to a third node in the target set, where a service type of the target set corresponds to a first service of the first node. Further, the third node establishes a connection to the first node, and sends information about the target set to the first node.
    Type: Application
    Filed: January 8, 2025
    Publication date: May 8, 2025
    Inventors: Chao Quan, Jian Wang, Xingqing Cheng
  • Publication number: 20250148946
    Abstract: Provided is a display drive system, including: a plurality of drive units and a control unit. The plurality of drive units are connected to a lamp panel, and at least one of the plurality of drive units is configured to drive, during a display stage, the lamp panel to emit light. The control unit is connected to the plurality of drive units, and is configured to detect an operating state of the drive units driving the lamp panel to emit light. In response to detecting that a first drive unit is abnormal, the lamp panel is driven, by a second drive unit, to emit light, wherein the first drive unit is at least one of the drive units driving the lamp panel to emit light, and the second drive unit is at least one of the plurality of drive units other than the first drive unit.
    Type: Application
    Filed: January 9, 2025
    Publication date: May 8, 2025
    Inventors: Chao YU, Enhui GUAN, Zhongkui WAN, Xinyi CHENG, Changlin LENG, Xingqun JIANG, Youxiang XIA
  • Publication number: 20250148746
    Abstract: The present disclosure discloses a chemical shift coded imaging method based on a transition region and regional iterative phasor extraction. Acquiring an initial image, and determining an initial phasor solution of the transition region based on the initial image; performing regional iterative phasor extraction in at least two set directions by taking the initial phasor solution as initial information, and obtaining a target phasor solution based on a regional iterative phasor extraction result corresponding to each set direction; and determining a first chemical composition signal and a second chemical composition signal based on the target phasor solution, and performing chemical shift coded imaging based on the first chemical composition signal and/or the second chemical composition signal.
    Type: Application
    Filed: January 13, 2025
    Publication date: May 8, 2025
    Applicant: SHENZHEN INSTITUTES OF ADVANCED TECHNOLOGY CHINESE ACADEMY OF SCIENCES
    Inventors: Hao PENG, Chao ZOU, Chuanli CHENG, Xin LIU, Hairong ZHENG
  • Publication number: 20250146590
    Abstract: An integrated air valve structure includes a main body and two air valves. The main body is formed with two air passages not communicated with each other, a plurality of through holes disposed corresponding to the two air passages, and two valve mounting seats. One valve mounting seat is disposed corresponding to one of the through holes, the other valve mounting seat is disposed corresponding to two of the through holes belonging to the two air passages. The two air valves are disposed on the two valve mounting seats, each air valves includes an air plug facing at least one of the through holes, a valve body assembled with one of the two valve mounting seats for the air plug to move therein, and a coil disposed on the valve body for generating magnetic force to change a position of the air plug.
    Type: Application
    Filed: November 7, 2023
    Publication date: May 8, 2025
    Inventors: Tsun-Hsiang WEN, Chia-Yu YU, Peng ZHAO, Yung-Cheng LIU, Chao-Wen HUANG
  • Publication number: 20250144150
    Abstract: The present invention provides a preparation method of pharmaceutical composition for treating chronic stroke, involving injection via brain into the cranium of a patient having chronic stroke for six months or more; the pharmaceutical composition is a suspension at least comprising adipose-derived stem cells treated by cell expansion, an active synergistic component and a growth factor, wherein the expression level of CD34 and CD45 of the adipose-derived stem cells treated by cell expansion is 10% or less, and the expression level of CD90 and CD105 is 90% or more; the active synergistic component is an extracellular vesicle; the growth factor is at least one selected from the group consisting of HGF, G-CSF, Fractalkine, IP-10, EGF, IL-1?, IL-1?, IL-4, IL-5, IL-13, IFN?, TGF? and sCD40L. The present invention overcomes the limitations of previous cell therapy and provides a cell-based preparation that is clinically safe and therapeutically effective for chronic cerebral stroke.
    Type: Application
    Filed: January 8, 2025
    Publication date: May 8, 2025
    Inventors: Po-Cheng Lin, Pi-Chun Huang, Chia-Hsin Lee, Ming-Hsi Chuang, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang, Yi-Chun Lin, Yu-Chen Tsai, Peggy Leh Jiunn Wong, Ruei-Yue Liang
  • Patent number: 12294023
    Abstract: A device includes a fin protruding from a semiconductor substrate; a gate stack over and along a sidewall of the fin; a gate spacer along a sidewall of the gate stack and along the sidewall of the fin; an epitaxial source/drain region in the fin and adjacent the gate spacer; and a corner spacer between the gate stack and the gate spacer, wherein the corner spacer extends along the sidewall of the fin, wherein a first region between the gate stack and the sidewall of the fin is free of the corner spacer, wherein a second region between the gate stack and the gate spacer is free of the corner spacer.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: May 6, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chen-Ping Chen, Kuei-Yu Kao, Shih-Yao Lin, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
  • Publication number: 20250137155
    Abstract: A carrier-attached ultra-thin copper foil and a method for producing the same are provided. The carrier-attached ultra-thin copper foil includes a copper foil carrier, a release layer, and an ultra-thin copper foil layer. The release layer is formed on a side surface of the copper foil carrier. The release layer contains a copper-containing organic compound, and a chemical structure of the copper-containing organic compound has at least a copper-nitrogen bond (Cu—N bond). The ultra-thin copper foil layer is formed on a side surface of the release layer away from the copper foil carrier. The copper foil carrier is capable of being separated from the ultra-thin copper foil layer through the release layer.
    Type: Application
    Filed: December 21, 2023
    Publication date: May 1, 2025
    Inventors: Te-Chao LIAO, Wei-Sheng CHENG, Yu-Chi Hsieh, Chia-Shan CHANG
  • Patent number: 12288632
    Abstract: A copper foil structure and a manufacturing method thereof are provided. In some embodiments, the copper foil structure includes a copper foil layer and a conductive organic anti-oxidation layer. The conductive organic anti-oxidation layer is disposed on the copper foil layer, and the conductive organic anti-oxidation layer includes an organic antioxidant and a conductive polymer.
    Type: Grant
    Filed: January 12, 2023
    Date of Patent: April 29, 2025
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Wei-Sheng Cheng, Chao-Tung Wu
  • Patent number: 12288812
    Abstract: A cyclic process including an etching process, a passivation process, and a pumping out process is provided to prevent over etching of the sacrificial gate electrode, particularly when near a high-k dielectric feature. The cyclic process solves the problems of failed gate electrode layer at an end of channel region and enlarges filling windows for replacement gate structures, thus improving channel control. Compared to state-of-art solutions, embodiments of the present disclosure also enlarge volume of source/drain regions, thus improving device performance.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: April 29, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuei-Yu Kao, Shih-Yao Lin, Chen-Ping Chen, Chih-Chung Chiu, Ke-Chia Tseng, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
  • Publication number: 20250129316
    Abstract: This disclosure relates to a biological tissue forming method includes the following steps: providing a biological tissue forming package with a base, a membrane, a sliding assembly and a sealing film that seals a chamber of the base used for receiving the membrane and the sliding assembly with one of the base and the sealing film being light-transmitting; passing a biological tissue fluid through the sealing film and the sliding assembly so as to be dispensed on the membrane; moving the sliding assembly away from a covering position used for covering the membrane via at least one passive magnetic element so as to expose the biological tissue fluid on the membrane; and emitting the biological tissue fluid exposed on the membrane by a curing light transmitting through the one of the base and the sealing film so as to cure the biological tissue fluid into a biological tissue.
    Type: Application
    Filed: December 15, 2023
    Publication date: April 24, 2025
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chao-Hong HSU, Teng-Yen WANG, Yang-Cheng LIN, Hsin-Yi HSU, Yu-Bing LIOU, Chang-Chou LI, Chih-Hung HUANG, Tung-Ying LIN, Li-Hsin LIN, Yuchi WANG, Hsin-Hsin SHEN
  • Publication number: 20250133783
    Abstract: A semiconductor device includes a substrate; at least one trench located at a top surface of the substrate; and a first dielectric layer, a second dielectric layer and a third dielectric layer that are sequentially stacked on an inner wall of each of the at least one trench. A topmost surface of the first dielectric layer is lower than a topmost surface of the second dielectric layer and the top surface of the substrate, to form a first groove between the second dielectric layer and the substrate. An edge corner between the top surface of the substrate and the inner wall of each of the at least one trench is in a shape of a fillet curve. The fillet structure is smooth and round without a sharp corner, reducing point discharge and improving reliability of the shallow trench isolation structure.
    Type: Application
    Filed: January 6, 2025
    Publication date: April 24, 2025
    Applicant: Fujian Jinhua Integrated Circuit Co, Ltd.
    Inventors: Huixian LAI, Yu Cheng Tung, Chao-Wei Lin, Chiayi Chu
  • Patent number: 12283596
    Abstract: A device includes a substrate, a channel layer, a gate structure, a first source/drain epitaxial structure, a second source/drain epitaxial structure, and a bottom dielectric structure. The channel layer is over the substrate. The gate structure is across the channel layer. The first source/drain epitaxial structure and the second source/drain epitaxial structure are on opposite sides of the channel layer and are connected to the channel layer. The bottom dielectric structure is between the first source/drain epitaxial structure and the substrate. A maximum width of the first source/drain epitaxial structure is greater than or equal to a maximum width of the bottom dielectric structure in a cross-sectional view.
    Type: Grant
    Filed: July 7, 2023
    Date of Patent: April 22, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Pi Tseng, De-Fang Chen, Chao-Cheng Chen
  • Publication number: 20250118707
    Abstract: An integrated circuit package and the method of forming the same are provided. The integrated circuit package may include a first die, a first gap-fill layer along sidewalls of the first die, a first bonding layer on the first die and the first gap-fill layer, and a first die connector in the first bonding layer. The first die connector may be directly over an interface between the first die and the first gap-fill layer.
    Type: Application
    Filed: October 6, 2023
    Publication date: April 10, 2025
    Inventors: Po-Cheng Chen, Chao-Wen Shih, Min-Chien Hsiao, Kuo-Chiang Ting, Yen-Ming Chen
  • Publication number: 20250120167
    Abstract: A semiconductor device includes a plurality of semiconductor layers vertically separated from one another, a gate structure that comprises a lower portion and an upper portion, a gate spacer that extends along a sidewall of the upper portion of the gate structure and has a bottom surface, and an etch stop layer extends between the portion of the bottom surface of the gate spacer and the top surface of the topmost semiconductor layer.
    Type: Application
    Filed: December 16, 2024
    Publication date: April 10, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Yu Kao, Chao-Cheng Chen, Chih-Han Lin, Chen-Ping Chen, Ming-Ching Chang, Shih-Yao Lin, Chih-Chung Chiu
  • Publication number: 20250120151
    Abstract: A method of fabricating a semiconductor structure includes forming a recess in an active channel structure by removing a portion thereof, filling the recess with a dielectric material, forming a cladding layer adjacent the active channel structure but not adjacent the dielectric material, and forming a gate structure comprising a first gate structure and a second gate structure around the active channel structure. A width of the dielectric material in the recess is greater than a width of the first gate structure and a width of the second gate structure.
    Type: Application
    Filed: December 16, 2024
    Publication date: April 10, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: KUEI-YU KAO, Shih-Yao LIN, Chen-Ping Chen, Chih-Han Lin, MING-CHING CHANG, CHAO-CHENG CHEN
  • Publication number: 20250119427
    Abstract: A method and apparatus for processing an access request, and a computer readable storage medium are provided. The method includes acquiring identification information and an IP address of an access account from an authentication message; determining permission configuration information matching the identification information; generating an access control entry based on the permission configuration information and the IP address; and processing an access request of an access account based on an access control entry.
    Type: Application
    Filed: December 16, 2024
    Publication date: April 10, 2025
    Inventors: Bo CHENG, Chao ZHANG, Lu Liu
  • Patent number: 12271207
    Abstract: A method for controlling a plurality of autonomous robots for performing environment maintenance operations includes: generating a setup command that indicates a selected location, a plurality of selected robots, an available time slot, and a distribution mode signal that indicates whether the selected robots are to be controlled based on the available time slot or an inputted priority section; and generating a plurality of sub-routes based on different parameters, depending on the distribution mode signal. The sub-routes are generated to be connected into an unbroken trail. Then, the sub-routes are transmitted to the selected robots, respectively, so as to control each of the selected robots to move along the respective one of the sub-routes.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: April 8, 2025
    Assignee: URSrobot AI Inc.
    Inventors: Chien-Tung Chen, Chung-Hou Wu, Chao-Cheng Chen, Wen-Wei Chiang, Yi-Jin Lin
  • Patent number: 12272022
    Abstract: The quality of a frame sequence is enhanced by a booster engine collaborating with a first stage circuit. The first stage circuit adjusts the quality degradation of the frame sequence when a condition in constrained resources is detected. The quality degradation includes at least one of uneven resolution and uneven frame per second (FPS). The booster engine receives the frame sequence from the first stage circuit, and generates an enhanced frame sequence based on the frame sequence for transmission to a second stage circuit.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: April 8, 2025
    Assignee: MediaTek Inc.
    Inventors: Yao-Sheng Wang, Pei-Kuei Tsung, Chiung-Fu Chen, Wai Mun Wong, Chao-Min Chang, Yu-Sheng Lin, Chiani Lu, Chih-Cheng Chen
  • Patent number: 12266308
    Abstract: A pixel circuit and a driving method thereof, and a display device are provided. The pixel circuit includes a driving sub-circuit, a data writing sub-circuit, a first light-emitting control sub-circuit, a second light-emitting control sub-circuit, a compensation sub-circuit, and a first reset sub-circuit, and is configured to generate a driving current to control a light-emitting element to emit light, the first reset sub-circuit comprises a first transistor, the compensation sub-circuit comprises a second transistor, the first transistor and the second transistor are both polysilicon oxide thin film transistors, and an active layer type of the first transistor and an active layer type of the second transistor are different from an active layer type of a transistor comprised in at least one selected from a group consisting of the driving sub-circuit, the data writing sub-circuit, the first light-emitting control sub-circuit, and the second light-emitting control sub-circuit.
    Type: Grant
    Filed: May 21, 2024
    Date of Patent: April 1, 2025
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Rui Wang, Ming Hu, Haijun Qiu, Weiyun Huang, Yao Huang, Chao Zeng, Yuanyou Qiu, Shaoru Li, Tianyi Cheng