Abstract: Provided is a probe card, comprising a guide plate and a shielding structure of single-layer or multi-layer. The guide plate comprises an upper surface, a lower surface, and at least one guide hole passing through the upper surface and the lower surface, and the guide hole is provided with an inner wall surface. At least one layer of the shielding structure is made of an electromagnetic absorption material or an electromagnetic reflection material, and the shielding structure is not connected to a ground. Each layer of the shielding structure is formed on the inner wall surface of the guide hole by means of atomic layer deposition or atomic layer etching, and a thickness of each layer is less than 1000 nm.

Abstract: Provided is a probe card, comprising a guide plate and a shielding structure of single-layer or multi-layer. The guide plate comprises an upper surface, a lower surface, and at least one guide hole passing through the upper surface and the lower surface, and the guide hole is provided with an inner wall surface. At least one layer of the shielding structure is made of an electromagnetic absorption material or an electromagnetic reflection material, and the shielding structure is not connected to a ground. Each layer of the shielding structure is formed on the inner wall surface of the guide hole by means of atomic layer deposition or atomic layer etching, and a thickness of each layer is less than 1000 nm.

Abstract: A protection layer for use in fabrication of failure analysis (FA) sample is disclosed, which principally comprises a first thin film, a buffer thin film and a second thin film By forming the protection layer on a surface of a malfunction device die, a FA sample of the malfunction device die is obtained. As a result, in the case of treating the sample with a FIB thinning process, there are no cracks, distortion, and/or collapse resulted from inter-elemental isobaric interferences, stress effect or charge accumulation occurring on the surface layer of the malfunction device die because of the protection of the protection layer. On the other hand, this protection layer can also be applied to a microLED element or a VCSEL element, so as to make microLED element and the VCSEL element possess excellent stress withstanding capability.

Abstract: A semiconductor device includes: a chip unit, a conductive wire unit, and a cover unit. The chip unit includes a substrate formed with an interconnect structure, and a semiconductor chip disposed on the substrate. The conductive wire unit includes a conductive wire that interconnects the semiconductor chip and the interconnect structure. The cover unit includes a cover member that covers the conductive wire. The cover member includes an insulating layer formed by atomic layer deposition. A method for making the semiconductor device is also disclosed.

Abstract: A protection layer for use in fabrication of failure analysis (FA) sample is disclosed, which principally comprises a first thin film, a buffer thin film and a second thin film By forming the protection layer on a surface of a malfunction device die, a FA sample of the malfunction device die is obtained. As a result, in the case of treating the sample with a FIB thinning process, there are no cracks, distortion, and/or collapse resulted from inter-elemental isobaric interferences, stress effect or charge accumulation occurring on the surface layer of the malfunction device die because of the protection of the protection layer. On the other hand, this protection layer can also be applied to a microLED element or a VCSEL element, so as to make microLED element and the VCSEL element possess excellent stress withstanding capability.