Patents by Inventor Chao-Chieh Yu

Chao-Chieh Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11927799
    Abstract: A data transmission system is disclosed. The data transmission system includes at least one signal processing device, at least one conversion device, at least one antenna device, and at least one flexible printed circuit board. The at least one signal processing device is configured to generate or receive at least one data. The at least one conversion device is configured to transform between the at least one data and an optical signal. The at least one antenna device is configured to obtain the at least one data according to the optical signal, and configured to receive or transmit the at least one data wirelessly. The at least one flexible printed circuit board includes at least one conductive layer and at least one optical waveguide layer. The at least one optical waveguide layer is configured to transmit the optical signal.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: March 12, 2024
    Inventors: Po-Kuan Shen, Chun-Chiang Yen, Chiu-Lin Yu, Kai-Lun Han, Jenq-Yang Chang, Mao-Jen Wu, Chao-Chieh Hsu
  • Patent number: 7136447
    Abstract: A clock recovery circuit for establishing bit synchronization with a received signal. The clock recovery circuit comprises a conventional early-late gate circuit and a loop filter. The loop filter receives an output signal of an early sample circuit included in the early-late gate circuit and an output signal of a late sample circuit included in the early-late gate circuit to generate a control signal output. The control signal is input to a clock-producing device included in the early-late gate circuit. The clock-producing device generates a clock at an ideal impulse-producing time controlled by the control signal. The ideal impulse-producing time is a middle point of the n-th symbol of the received signal.
    Type: Grant
    Filed: February 14, 2003
    Date of Patent: November 14, 2006
    Assignee: Faraday Technology Corp.
    Inventors: Jiu-Cheng Chen, Chao-Chieh Yu
  • Publication number: 20040161071
    Abstract: A clock recovery circuit for establishing bit synchronization with a received signal. The clock recovery circuit comprises a conventional early-late gate circuit and a loop filter. The loop filter receives an output signal of an early sample circuit included in the early-late gate circuit and an output signal of a late sample circuit included in the early-late gate circuit to generate a control signal output. The control signal is input to a clock-produced device included in the early-late gate circuit. The clock-produced device generates a clock at an ideal impulse-produced time controlled by the control signal. The ideal impulse-produced time is a middle point of the n-th symbol of the received signal.
    Type: Application
    Filed: February 14, 2003
    Publication date: August 19, 2004
    Inventors: Jiu-Cheng Chen, Chao-Chieh Yu