Patents by Inventor Chao Hsiang Wang

Chao Hsiang Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200257152
    Abstract: The display device includes a first substrate; an active layer disposed on the first substrate; a first insulation layer disposed on the active layer; a first electrode layer disposed on the first insulation layer including a gate electrode line extending along a first direction and a protruding portion extending along a second direction; a second insulation layer disposed on the first electrode layer; and a second electrode layer disposed on the second insulation layer. The second electrode layer includes a date line extending along the second direction and a conductive layer. The conductive layer includes a first conductive portion and a second conductive portion, wherein the first conductive portion has a first maximum width A along the first direction, and the second conductive portion has a second maximum width B along the first direction. The first maximum width A is less than the second maximum width B.
    Type: Application
    Filed: April 29, 2020
    Publication date: August 13, 2020
    Inventors: Chung-Wen YEN, Yu-Tsung LIU, Chao-Hsiang WANG, Te-Yu LEE
  • Publication number: 20200249511
    Abstract: The display device includes a first substrate; an active layer disposed on the first substrate; a first insulation layer disposed on the active layer; a first electrode layer disposed on the first insulation layer including a gate electrode line extending along a first direction and a protruding portion extending along a second direction; a second insulation layer disposed on the first electrode layer; and a second electrode layer disposed on the second insulation layer. The second electrode layer includes a date line extending along the second direction and a conductive layer. The conductive layer includes a first conductive portion and a second conductive portion, wherein the first conductive portion has a first maximum width A along the first direction, and the second conductive portion has a second maximum width B along the first direction. The first maximum width A is less than the second maximum width B.
    Type: Application
    Filed: April 24, 2020
    Publication date: August 6, 2020
    Inventors: Chung-Wen YEN, Yu-Tsung LIU, Chao-Hsiang WANG, Te-Yu LEE
  • Publication number: 20200243664
    Abstract: A semiconductor device and a method for fabricating the semiconductor device are provided, in which the method includes the steps of forming a gate structure on a substrate, forming a spacer on a sidewall of the gate structure, forming two recesses adjacent to two sides of the spacer, performing a cleaning process to trim the spacer for forming a void between the spacer and the substrate, and forming two portions of an epitaxial layer in the two recesses. The semiconductor device preferably includes a cap layer on the two portions of the epitaxial layer as the cap layer includes a planar top surface and an inclined sidewall.
    Type: Application
    Filed: March 6, 2019
    Publication date: July 30, 2020
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Patent number: 10700202
    Abstract: A semiconductor device is disclosed. The semiconductor device comprises a substrate, a gate structure disposed on the substrate, a spacer disposed on the substrate and covering a sidewall of the gate structure, an air gap sandwiched between the spacer and the substrate, and a source/drain region disposed in the substrate and having a faceted surface exposed from the substrate, wherein the faceted surface borders the substrate on a boundary between the air gap and the substrate.
    Type: Grant
    Filed: October 28, 2018
    Date of Patent: June 30, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuang-Hsiu Chen, Sung-Yuan Tsai, Chi-Hsuan Tang, Kai-Hsiang Wang, Chao-Nan Chen, Shi-You Liu, Chun-Wei Yu, Yu-Ren Wang
  • Patent number: 10670935
    Abstract: The display device includes a first substrate; an active layer disposed on the first substrate; a first insulation layer disposed on the active layer; a first electrode layer disposed on the first insulation layer including a gate electrode line extending along a first direction and a protruding portion extending along a second direction; a second insulation layer disposed on the first electrode layer; and a second electrode layer disposed on the second insulation layer. The second electrode layer includes a date line extending along the second direction and a conductive layer. The conductive layer includes a first conductive portion and a second conductive portion, wherein the first conductive portion has a first maximum width A along the first direction, and the second conductive portion has a second maximum width B along the first direction. The first maximum width A is less than the second maximum width B.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: June 2, 2020
    Assignee: INNOLUX CORPORATION
    Inventors: Chung-Wen Yen, Yu-Tsung Liu, Chao-Hsiang Wang, Te-Yu Lee
  • Patent number: 10661465
    Abstract: A display panel is provided. The display panel includes a substrate and a plurality of cutting rulers. The substrate includes a non-display area and a border surrounding the non-display area. The border includes at least one curved edge and at least one straight edge. The cutting rulers are disposed adjacent to the border. The numbers of the cutting rulers are determined according to the accuracy requirements and the shape of the display panel to meet various needs and improve productivity and product yield.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: May 26, 2020
    Assignee: INNOLUX CORPORATION
    Inventors: Chung-Wen Yen, Chao-Hsiang Wang, Huan-Kuang Peng
  • Publication number: 20200158646
    Abstract: A surface-enhanced Raman scattering (SERS) detection method is provided for detecting a target analyte in a sample. The SERS detection method generally includes the steps of: (a). preparing an extract of the sample; (b). introducing the sample extract onto a SERS substrate, causing the target analyte to be absorbed in the SERS substrate; (c). introducing a volatile organic solvent onto the SERS substrate to have the target analyte of the sample extract dissolved and comes out of the SERS substrate; (d). irradiating the SERS substrate with light to evaporate the volatile organic solvent, leaving a more condensed target analyte on the SERS substrate; (e). irradiating the condensed target analyte with laser light to have the target analyte penetrate deeply into the SERS substrate; and (f). performing Raman measurement with a laser beam focusing on the SERS substrate to analyze the target analyte.
    Type: Application
    Filed: July 20, 2017
    Publication date: May 21, 2020
    Inventors: CHAO-MING TSEN, CHING-WEI YU, WEI-CHUNG CHAO, YUNG-HSIANG WANG, CHENG-CHIEN LI, SHAO-KAI LIN, TZU-HUNG HSU, CHANG-JUNG WEN
  • Publication number: 20200152115
    Abstract: A source driver for a panel includes a plurality of driver cells. Each of the driver cells includes an output driver, a plurality of bias voltage generators and a selector. The output driver is configured to output a plurality of display data to the panel. The plurality of bias voltage generators is coupled to the output driver. Each of the bias voltage generators is configured to provide at least one bias voltage for the output driver. The selector, coupled to the output driver, is configured to select the bias voltage from one of the bias voltage generators to be provided for the output driver according to the plurality of display data.
    Type: Application
    Filed: November 8, 2018
    Publication date: May 14, 2020
    Inventors: Chao-Kai Tu, Yueh-Hsun Tsai, Tzung-Yun Tsai, Kai-Yue Lin, Ying-Hsiang Wang
  • Publication number: 20200135664
    Abstract: A semiconductor package includes a first die having a first substrate, an interconnect structure overlying the first substrate and having multiple metal layers with vias connecting the multiple metal layers, a seal ring structure overlying the first substrate and along a periphery of the first substrate, the seal ring structure having multiple metal layers with vias connecting the multiple metal layers, the seal ring structure having a topmost metal layer, the topmost metal layer being the metal layer of the seal ring structure that is furthest from the first substrate, the topmost metal layer of the seal ring structure having an inner metal structure and an outer metal structure, and a polymer layer over the seal ring structure, the polymer layer having an outermost edge that is over and aligned with a top surface of the outer metal structure of the seal ring structure.
    Type: Application
    Filed: October 10, 2019
    Publication date: April 30, 2020
    Inventors: Chih-Hsiang Tseng, Yu-Feng Chen, Cheng Jen Lin, Wen-Hsiung Lu, Ming-Da Cheng, Kuo-Ching Hsu, Hong-Seng Shue, Ming-Hong Cha, Chao-Yi Wang, Mirng-Ji Lii
  • Publication number: 20200135978
    Abstract: A light-emitting device includes a first semiconductor layer; a plurality of semiconductor pillars separated from each other and formed on the first semiconductor layer, the plurality of semiconductor pillars respectively includes a second semiconductor layer and an active layer; a first electrode covering one portion of the plurality of semiconductor pillars; and a second electrode covering another portion of the plurality of semiconductor pillars, wherein the plurality of semiconductor pillars under a covering region of the first electrode are separated from each other by a first space, the plurality of semiconductor pillars outside the covering region of the first electrode are separated from each other by a second space, and the first space is larger than the second space.
    Type: Application
    Filed: December 24, 2019
    Publication date: April 30, 2020
    Inventors: Aurelien GAUTHIER-BRUN, Chao-Hsing CHEN, Chang-Tai HSAIO, Chih-Hao CHEN, Chi-Shiang HSU, Jia-Kuen WANG, Yung-Hsiang LIN
  • Publication number: 20200098916
    Abstract: A semiconductor device is disclosed. The semiconductor device comprises a substrate, a gate structure disposed on the substrate, a spacer disposed on the substrate and covering a sidewall of the gate structure, an air gap sandwiched between the spacer and the substrate, and a source/drain region disposed in the substrate and having a faceted surface exposed from the substrate, wherein the faceted surface borders the substrate on a boundary between the air gap and the substrate.
    Type: Application
    Filed: October 28, 2018
    Publication date: March 26, 2020
    Inventors: Kuang-Hsiu Chen, Sung-Yuan Tsai, Chi-Hsuan Tang, Kai-Hsiang Wang, Chao-Nan Chen, Shi-You Liu, Chun-Wei Yu, Yu-Ren Wang
  • Patent number: 10560400
    Abstract: A method for managing traffic item in software defined networking includes establishing a downlink flow table of a switch according to the flow entries, establishing an uplink flow table of the switch according to the flow entries, acquiring a data packet by the switch, and generating a transmission path to allocate the data packet according to the data packet, the downlink flow table, and the uplink flow table. The downlink flow table includes a correlation between first transmission ports of the switch and down link switches. The uplink flow table includes a correlation between the first transmission ports and a transmission port group of uplink switches.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: February 11, 2020
    Assignees: Inventec (Pudong) Technology Corp., Inventec Corporation
    Inventors: Chi-Hsiang Hung, Chao-Wei Huang, Li-Chun Wang, Te-Yen Liu
  • Publication number: 20200044116
    Abstract: A light-emitting device includes a substrate including a top surface, a first side surface and a second side surface, wherein the first side surface and the second side surface of the substrate are respectively connected to two opposite sides of the top surface of the substrate; a semiconductor stack formed on the top surface of the substrate, the semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a first electrode pad formed adjacent to a first edge of the light-emitting device; and a second electrode pad formed adjacent to a second edge of the light-emitting device, wherein in a top view of the light-emitting device, the first edge and the second edge are formed on different sides or opposite sides of the light-emitting device, the first semiconductor layer adjacent to the first edge includes a first sidewall directly connected to the first side surface of the substrate,
    Type: Application
    Filed: August 1, 2019
    Publication date: February 6, 2020
    Inventors: Chao-Hsing CHEN, Cheng-Lin LU, Chih-Hao CHEN, Chi-Shiang HSU, I-Lun MA, Meng-Hsiang HONG, Hsin-Ying WANG, Kuo-Ching HUNG, Yi-Hung LIN
  • Patent number: 10553759
    Abstract: A light-emitting device includes a first semiconductor layer; a plurality of semiconductor pillars separated from each other and formed on the first semiconductor layer, the plurality of semiconductor pillars respectively includes a second semiconductor layer and an active layer; a first electrode covering one portion of the plurality of semiconductor pillars; and a second electrode covering another portion of the plurality of semiconductor pillars, wherein the plurality of semiconductor pillars under a covering region of the first electrode are separated from each other by a first space, the plurality of semiconductor pillars outside the covering region of the first electrode are separated from each other by a second space, and the first space is larger than the second space.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: February 4, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Aurelien Gauthier-Brun, Chao-Hsing Chen, Chang-Tai Hsaio, Chih-Hao Chen, Chi-Shiang Hsu, Jia-Kuen Wang, Yung-Hsiang Lin
  • Patent number: 10522566
    Abstract: A touch display device is provided and includes a substrate, a plurality of light-emitting units, and a plurality of touch electrodes. The substrate includes a first edge. The light-emitting units are disposed on the substrate. The touch electrodes are disposed on the light-emitting units. A first distance is a minimum distance from the first edge to the light-emitting units parallel to the substrate, a second distance is a minimum distance from the first edge to the touch electrodes parallel to the substrate, and the first distance is greater than the second distance.
    Type: Grant
    Filed: March 7, 2017
    Date of Patent: December 31, 2019
    Assignee: InnoLux Corporation
    Inventors: Hsiao-Lang Lin, Jui-Jen Yueh, Chao-Hsiang Wang
  • Patent number: 10503038
    Abstract: A display device includes a first substrate, and a semiconductor layer, and a gate line disposed over the first substrate. The gate line overlaps the semiconductor layer. The display device also includes a first insulating layer disposed over the semiconductor layer, wherein a first opening is formed through the first insulating layer. The display device further includes a metal pad disposed over the first insulating layer, being electrically connected to the semiconductor layer through the first opening, and a data line disposed over the first insulating layer, wherein the data line crosses the gate line. In addition, the display device includes a second insulating layer disposed over the metal pad and the first insulating layer, wherein a second opening is formed through the second insulating layer, and the second opening at least partially overlaps the gate line.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: December 10, 2019
    Assignee: INNOLUX CORPORATION
    Inventors: Yu-Tsung Liu, Kuan-Yu Chiu, Te-Yu Lee, Chao-Hsiang Wang
  • Publication number: 20190360938
    Abstract: A method for detecting dust mite antigens includes the steps of collecting a dust sample, applying an extraction and cleanup procedure for dust mite antigens from the dust sample in order to obtain a sample solution ready for measurement, and placing the sample solution on a SERS chip without immunological modification and under a Raman spectrometer for SERS detection in order to identify whether any dust mite antigens exist in the sample solution.
    Type: Application
    Filed: May 24, 2019
    Publication date: November 28, 2019
    Inventors: CHUN-YU CHUANG, PIN-HSUAN YEH, CHAO-MING TSEN, CHING-WEI YU, WEI-CHUNG CHAO, YUNG-HSIANG WANG, CHENG-CHIEN LI
  • Patent number: 10481709
    Abstract: An electronic device is provided. The electronic device includes a substrate, a first contacting element, a second contacting element and a connecting element. The substrate has a first surface and a second surface. The substrate has a through hole located between the first surface and the second surface. At least a part of the connecting element is disposed in the through hole. The first contacting element is disposed on the first surface. The second contacting element is disposed on the second surface. The first contacting element electrically connects the second contacting element through the connecting element.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: November 19, 2019
    Inventors: Jui-Jen Yueh, Chung-Wen Yen, Chao-Hsiang Wang
  • Patent number: 10481443
    Abstract: A display panel is provided. The display panel includes a first substrate; a second substrate; a shielding layer; a first color filter; and a spacer. The second substrate is disposed opposite the first substrate. The shielding layer is disposed over the second substrate, wherein the shielding layer includes two shielding pattern rows projected onto the second substrate. The first color filter is disposed over the second substrate and the shielding layer. The spacer is disposed over the first color filter, wherein the spacer includes a spacer pattern projected onto the second substrate, and the spacer pattern overlaps one of the two shielding pattern rows, and the one of the two shielding pattern rows includes an expansion portion, wherein the expansion portion has an edge and at least part of the edge is curved.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: November 19, 2019
    Assignee: INNOLUX CORPORATION
    Inventors: Chung-Wen Yen, Yi-Chen Hsiao, Chao-Hsiang Wang
  • Publication number: 20190314995
    Abstract: A method for controlling an object is provided. The method includes selecting an image data corresponding to a first code; converting the first code into a second code; and controlling the object by the second code or a portion of the second code.
    Type: Application
    Filed: April 12, 2018
    Publication date: October 17, 2019
    Inventors: CHAO HSIANG WANG, CHIA MAO SHIH, LI CHUNG TENG