Patents by Inventor Chao-Hsuan PAN

Chao-Hsuan PAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit and fabricating method thereof
    Patent number: 9082617
    Abstract: An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a semiconductor substrate, at least one deep n-well in the semiconductor substrate, at least one p-channel metal-oxide-semiconductor transistor in the deep n-well, at least one n-channel metal-oxide-semiconductor transistor outside of the deep n-well, an first interconnect structure, and a protection component. Both of the p-channel metal-oxide-semiconductor transistor and the n-channel metal-oxide-semiconductor transistor are disposed in the semiconductor substrate, and are electrically coupled by the first interconnect structure. The protection component is disposed in the semiconductor substrate, wherein the protection component is electrically coupled to the deep n-well.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: July 14, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Yuan Su, Hung-Ta Huang, Ping-Hao Lin, Hung-Che Liao, Hung-Yu Chiu, Chao-Hsuan Pan, Wen-Tsung Chen, Chih-Ming Huang
  • INTEGRATED CIRCUIT AND FABRICATING METHOD THEREOF
    Publication number: 20150171069
    Abstract: An integrated circuit and a method of fabricating the integrated circuit are provided. In various embodiments, the integrated circuit includes a semiconductor substrate, at least one deep n-well in the semiconductor substrate, at least one p-channel metal-oxide-semiconductor transistor in the deep n-well, at least one n-channel metal-oxide-semiconductor transistor outside of the deep n-well, an first interconnect structure, and a protection component. Both of the p-channel metal-oxide-semiconductor transistor and the n-channel metal-oxide-semiconductor transistor are disposed in the semiconductor substrate, and are electrically coupled by the first interconnect structure. The protection component is disposed in the semiconductor substrate, wherein the protection component is electrically coupled to the deep n-well.
    Type: Application
    Filed: December 17, 2013
    Publication date: June 18, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Yuan SU, Hung-Ta HUANG, Ping-Hao LIN, Hung-Che LIAO, Hung-Yu CHIU, Chao-Hsuan PAN, Wen-Tsung CHEN, Chih-Ming HUANG