Patents by Inventor CHAO-HSUAN WANG

CHAO-HSUAN WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12095179
    Abstract: An electronic device includes a metal back cover and an antenna module. The metal back cover includes a slit. The antenna module is separated from the metal back cover and disposed far away from the slit. The antenna module includes an antenna radiator, a first ground radiator, and a connection radiator. The antenna radiator includes a first section, a second section, and a third section that are sequentially connected and form bends, and the first section has a feeding end. A first slot is formed between the first ground radiator, the first section, the second section, and a part of the third section. A width and length of the first slot are associated with a center frequency and impedance matching of a high frequency band.
    Type: Grant
    Filed: August 29, 2022
    Date of Patent: September 17, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Hau Yuen Tan, Cheng-Hsiung Wu, Chen-Kuang Wang, Tse-Hsuan Wang, Sheng-Chin Hsu, Shih-Keng Huang, Chia-Hung Chen
  • Publication number: 20240304705
    Abstract: A semiconductor device includes a gate structure on a substrate, a first spacer on a sidewall of the gate structure, a second spacer on a sidewall of the first spacer, a third spacer on a sidewall of the second spacer, and first and second stacks of an epitaxial layer and a cap layer respectively disposed at first and second sides of the gate structure. Preferably, a part of the second spacer comprises an I-shape, the cap layer includes a planar top surface and an inclined sidewall, the cap layer contacts the second spacer and the third spacer directly, and the cap layer includes a vertical sidewall connected to the inclined sidewall.
    Type: Application
    Filed: May 16, 2024
    Publication date: September 12, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Patent number: 12080943
    Abstract: An antenna module disposed on a substrate having a first and a second surface opposite to each other includes a microstrip line, a first radiator, a ground radiator and a ground plane. The microstrip line, the first radiator and the ground radiator are disposed on the first surface. The microstrip line includes a first and a second end opposite to each other. The first end includes a first feeding end. The first radiator is connected to the second end of the microstrip line. The ground radiator surrounds the microstrip line and the first radiator and has a first opening and two opposite grounding ends. The first end of the microstrip line is located in the first opening. A gap is formed between each grounding end and the first feeding end. The ground plane is disposed on the second surface. The ground radiator is connected to the ground plane.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: September 3, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Tse-Hsuan Wang, Chih-Fu Chang, Chao-Hsu Wu, Shih-Keng Huang, Hau Yuen Tan
  • Publication number: 20240266236
    Abstract: An electronic package module and the method for fabrication of the same are provided. The method for fabricating the electronic package module includes providing a circuit substrate. An interposer frame and a first electronic component are disposed on the circuit substrate, and a shielding material with an opening overlapping the electronic component is disposed on the interposer frame. Subsequently, with the shielding material being as a mask, the molding material is filled into through the opening, thereby forming the molding layer encapsulating the electronic component. After forming the molding layer, the shielding material is removed, so that an interface of the interposer frame is exposed. Therefore, the solder ball can be disposed on the interface of the interposer frame without further machining of the molding layer.
    Type: Application
    Filed: July 19, 2023
    Publication date: August 8, 2024
    Inventors: LI-CHENG SHEN, Chao-Hsuan Wang
  • Patent number: 12040561
    Abstract: An antenna module includes a transceiver chip, a transmitting array antenna, a receiving array antenna, two bandpass filters, and two capacitors. The transmitting array antenna and the receiving array antenna are symmetrically disposed at the two opposite sides of the transceiver chip. One of the bandpass filters is disposed between the transceiver chip and the transmitting array antenna and connected to the transceiver chip and the transmitting array antenna. The other bandpass filter is disposed between the transceiver chip and the receiving array antenna and connected to the transceiver chip and the receiving array antenna. One of the capacitors is disposed between the transmitting array antenna and the corresponding bandpass filter and connected to the transmitting array antenna and the corresponding bandpass filter. The other capacitor is disposed between the receiving array antenna and the corresponding bandpass filter and connected to the receiving array antenna and the corresponding bandpass filter.
    Type: Grant
    Filed: October 17, 2022
    Date of Patent: July 16, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Tse-Hsuan Wang, Chien-Yi Wu, Chih-Fu Chang, Chao-Hsu Wu, Chih-Yi Chiu, Wei-Han Yen, Tsung-Chi Tsai, Shih-Keng Huang, I-Shu Lee
  • Patent number: 11869850
    Abstract: A package structure and a manufacturing method for the same are provided. The package structure includes a circuit, a mold sealing layer, a conductive metal board, and a conductive layer. The circuit board includes a substrate and a first electronic element disposed on the substrate. The mold sealing layer is disposed on the substrate and covers the first electronic element. The mold sealing layer has a top surface, a bottom surface corresponding to the top surface, and a side surface connected between the top surface and the bottom surface. The conductive metal board is disposed on the top surface and adjacent to the first electronic element. The conductive layer is disposed on the side surface and electrically connected to the conductive metal board. The conductive metal board and the conductive layer are each an independent component.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: January 9, 2024
    Assignee: WISTRON NEWEB CORPORATION
    Inventors: Lee-Cheng Shen, Chao-Hsuan Wang, Po-Sheng Huang
  • Publication number: 20230053850
    Abstract: A package structure and a manufacturing method for the same are provided. The package structure includes a circuit, a mold sealing layer, a conductive metal board, and a conductive layer. The circuit board includes a substrate and a first electronic element disposed on the substrate. The mold sealing layer is disposed on the substrate and covers the first electronic element. The mold sealing layer has a top surface, a bottom surface corresponding to the top surface, and a side surface connected between the top surface and the bottom surface. The conductive metal board is disposed on the top surface and adjacent to the first electronic element. The conductive layer is disposed on the side surface and electrically connected to the conductive metal board. The conductive metal board and the conductive layer are each an independent component.
    Type: Application
    Filed: October 13, 2022
    Publication date: February 23, 2023
    Inventors: LEE-CHENG SHEN, CHAO-HSUAN WANG, PO-SHENG HUANG
  • Patent number: 11410901
    Abstract: A package structure and a manufacturing method thereof are provided. The package structure includes a circuit board, a barrier structure and a molding layer. The circuit board includes a substrate and a component disposed on the substrate. The substrate includes a molding area and a non-molding area, and the component is disposed on the molding area. The barrier structure is disposed on the substrate and located between the molding area and the non-molding area. The barrier structure has a first predetermined height. The molding layer is disposed on the molding area and covers the component. The molding layer has a second predetermined height. The first predetermined height of the barrier structure is less than or equal to the second predetermined height of the molding layer.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: August 9, 2022
    Assignee: WISTRON NEWEB CORPORATION
    Inventors: Lee-Cheng Shen, Ying-Po Hung, Chao-Chieh Chan, Chao-Hsuan Wang
  • Publication number: 20210398911
    Abstract: A package structure and a manufacturing method for the same are provided. The package structure includes a circuit, a mold sealing layer, a conductive metal board, and a conductive layer. The circuit board includes a substrate and a first electronic element disposed on the substrate. The mold sealing layer is disposed on the substrate and covers the first electronic element. The mold sealing layer has a top surface, a bottom surface corresponding to the top surface, and a side surface connected between the top surface and the bottom surface. The conductive metal board is disposed on the top surface and adjacent to the first electronic element. The conductive layer is disposed on the side surface and electrically connected to the conductive metal board. The conductive metal board and the conductive layer are each an independent component.
    Type: Application
    Filed: September 9, 2020
    Publication date: December 23, 2021
    Inventors: LEE-CHENG SHEN, CHAO-HSUAN WANG, PO-SHENG HUANG
  • Publication number: 20210151358
    Abstract: A package structure and a manufacturing method thereof are provided. The package structure includes a circuit board, a barrier structure and a molding layer. The circuit board includes a substrate and a component disposed on the substrate. The substrate includes a molding area and a non-molding area, and the component is disposed on the molding area. The barrier structure is disposed on the substrate and located between the molding area and the non-molding area. The barrier structure has a first predetermined height. The molding layer is disposed on the molding area and covers the component. The molding layer has a second predetermined height. The first predetermined height of the barrier structure is less than or equal to the second predetermined height of the molding layer.
    Type: Application
    Filed: August 26, 2020
    Publication date: May 20, 2021
    Inventors: LEE-CHENG SHEN, YING-PO HUNG, CHAO-CHIEH CHAN, CHAO-HSUAN WANG