Abstract: A semiconductor arrangement and method of forming the same are described. A semiconductor arrangement includes a third metal connect in contact with a first metal connect in a first active region and a second metal connect in a second active region, and over a shallow trench isolation region located between the first active region and a second active region. A method of forming the semiconductor arrangement includes forming a first opening over the first metal connect, the STI region, and the second metal connect, and forming the third metal connect in the first opening. Forming the third metal connect over the first metal connect and the second metal connect mitigates RC coupling.

Abstract: Self-aligned contacts are provided. In an embodiment the self-aligned contacts are formed by partially removing a first dielectric material from adjacent to a gate electrode and fully removing a second dielectric material from adjacent to the gate electrode. A conductive material is deposited into the regions of the removed first dielectric material and the second dielectric material, and the conductive material and metal gates are recessed below a spacer. A dielectric layer is deposited over the recessed conductive material and the recessed metal gates, and the self-aligned contacts are formed through the dielectric layer.

Abstract: A semiconductor arrangement and method of forming the same are described. A semiconductor arrangement includes a third metal connect in contact with a first metal connect in a first active region and a second metal connect in a second active region, and over a shallow trench isolation region located between the first active region and a second active region. A method of forming the semiconductor arrangement includes forming a first opening over the first metal connect, the STI region, and the second metal connect, and forming the third metal connect in the first opening. Forming the third metal connect over the first metal connect and the second metal connect mitigates RC coupling.

Abstract: A method for fabricating a lateral-epitaxial-overgrowth thin-film LED with a nanoscale-roughened structure is provided. The lateral-epitaxial-overgrowth thin-film LED with a nanoscale-roughened structure has a substrate, a metal bonding layer formed on the substrate, a first electrode formed on the metal bonding layer, a semiconductor structure formed on the first electrode with a lateral-epitaxial-growth technology, and a second electrode formed on the semiconductor structure. A nanoscale-roughened structure is formed on the semiconductor structure except the region covered by the second electrode. Lateral epitaxial growth is used to effectively inhibit the stacking faults and reduce the thread dislocation density in the semiconductor structure to improve the crystallization quality of the light-emitting layer and reduce leakage current. Meanwhile, the surface roughened structure on the semiconductor structure can promote the external quantum efficiency.

Abstract: A light emitting device with graded composition hole tunneling layer is provided. The device comprises a substrate and an n-type semiconductor layer is disposed on the substrate, in which the n-type semiconductor layer comprises a first portion and a second portion. A graded composition hole tunneling layer is disposed on the first portion of the n-type semiconductor layer. An electron blocking layer is disposed on the graded composition hole tunneling layer. A p-type semiconductor layer is disposed on the electron blocking layer. A first electrode is disposed on the p-type semiconductor layer, and a second electrode is disposed on the second portion of the n-type semiconductor layer and is electrical insulated from the first portion of the n-type semiconductor. The graded composition hole tunneling layer is used as the quantum-well to improve the transport efficiency of the holes to increase the light emitting efficiency of the light emitting device.

Abstract: A semiconductor light emitting device is disclosed, which comprises: a substrate having a first surface and a second surface; a first semiconductor conductive layer is disposed on the first surface of the substrate; an insert layer is disposed on the first semiconductor conductive layer; an active layer is disposed on the insert layer; a second semiconductor conductive layer is disposed on the active layer; a first electrode is disposed on the second semiconductor conductive layer; and a second electrode is disposed on the second surface of the substrate, in which the electric of the second electrode is opposite to that of the first electrode.

Abstract: A light emitting device with graded composition hole tunneling layer is provided. The device comprises a substrate and an n-type semiconductor layer is disposed on the substrate, in which the n-type semiconductor layer comprises a first portion and a second portion. A graded composition hole tunneling layer is disposed on the first portion of the n-type semiconductor layer. An electron blocking layer is disposed on the graded composition hole tunneling layer. A p-type semiconductor layer is disposed on the electron blocking layer. A first electrode is disposed on the p-type semiconductor layer, and a second electrode is disposed on the second portion of the n-type semiconductor layer and is electrical insulated from the first portion of the n-type semiconductor. The graded composition hole tunneling layer is used as the quantum-well to improve the transport efficiency of the holes to increase the light emitting efficiency of the light emitting device.

Abstract: The present invention discloses a lateral-epitaxial-overgrowth thin-film LED with a nanoscale-roughened structure and a method for fabricating the same. The lateral-epitaxial-overgrowth thin-film LED with a nanoscale-roughened structure comprises a substrate, a metal bonding layer formed on the substrate, a first electrode formed on the metal bonding layer, a semiconductor structure formed on the first electrode with a lateral-epitaxial-growth technology, and a second electrode formed on the semiconductor structure, wherein a nanoscale-roughened structure is formed on the semiconductor structure except the region covered by the second electrode. The present invention uses lateral epitaxial growth to effectively inhibit the stacking faults and reduce the thread dislocation density in the semiconductor structure to improve the crystallization quality of the light-emitting layer and reduce leakage current.

Abstract: A semiconductor light emitting device is disclosed, which comprises: a substrate having a first surface and a second surface; a first semiconductor conductive layer is disposed on the first surface of the substrate; an insert layer is disposed on the first semiconductor conductive layer; an active layer is disposed on the insert layer; a second semiconductor conductive layer is disposed on the active layer; a first electrode is disposed on the second semiconductor conductive layer; and a second electrode is disposed on the second surface of the substrate, in which the electric of the second electrode is opposite to that of the first electrode.