Patents by Inventor Chao-Huang Wu

Chao-Huang Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11223328
    Abstract: A dual-mode signal amplifying circuit includes: a first and a second input terminals for receiving differential input signals; two output terminals for providing differential output signals; a first through a third current sources; a first switch positioned between the first current source and a first node, and controlled by the first input terminal; a second switch positioned between the first current source and a second node, and controlled by the second input terminal; a third switch positioned between the first node and a fixed-voltage terminal, and controlled by a third node; a fourth switch positioned between the second node and a fixed-voltage terminal and controlled by the third node; a fifth switch positioned between the second current source and a fixed-voltage terminal, and controlled by the first node; and a sixth switch positioned between the third current source and a fixed-voltage terminal, and controlled by the second node.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: January 11, 2022
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Chao-Huang Wu, Yi-Shao Chang, Han-Chang Kang, Ka-Un Chan
  • Patent number: 11012167
    Abstract: A receiving device comprises a first receiving circuit, for receiving a plurality of signals and comparing a plurality of signal powers of the plurality of signals with a first threshold, to generate a first plurality of comparison results; a second receiving circuit, for receiving the plurality of signals and comparing the plurality of signal powers of the plurality of signals with a second threshold, to generate a second plurality of comparison results, wherein the first threshold is smaller than the second threshold; and a control circuit, coupled to the first receiving circuit and the second receiving circuit, for determining whether an average signal power of the plurality of signals is greater than a reference power according to the first plurality of comparison results and the second plurality of comparison results, to generate a determination result.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: May 18, 2021
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chao-Huang Wu, Han-Chang Kang, Ka-Un Chan
  • Publication number: 20200350872
    Abstract: A dual-mode signal amplifying circuit includes: a first and a second input terminals for receiving differential input signals; two output terminals for providing differential output signals; a first through a third current sources; a first switch positioned between the first current source and a first node, and controlled by the first input terminal; a second switch positioned between the first current source and a second node, and controlled by the second input terminal; a third switch positioned between the first node and a fixed-voltage terminal, and controlled by a third node; a fourth switch positioned between the second node and a fixed-voltage terminal and controlled by the third node; a fifth switch positioned between the second current source and a fixed-voltage terminal, and controlled by the first node; and a sixth switch positioned between the third current source and a fixed-voltage terminal, and controlled by the second node.
    Type: Application
    Filed: July 21, 2020
    Publication date: November 5, 2020
    Applicant: Realtek Semiconductor Corp.
    Inventors: Chao-Huang WU, Yi-Shao CHANG, Han-Chang KANG, Ka-Un CHAN
  • Patent number: 10819289
    Abstract: A signal processing circuit includes a signal receiving circuit for generating a first input signal and a second input signal; a signal output circuit for generating a first output signal and a second output signal according to the first input signal and the second input signal; a negative impedance circuit, for amplifying the first input signal at the first input terminal to generate a first amplified input signal at the second output terminal, and for amplifying the second input signal at the second input terminal to generate a second amplified input signal at the first output terminal; a first capacitor; a second capacitor; wherein the first capacitor and the second capacitor have different DC voltage levels at both terminals, such that the impedance-signal variation rate of the negative impedance circuit is lower than a predetermined level.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: October 27, 2020
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chao-Huang Wu, Ka-Un Chan
  • Patent number: 10763793
    Abstract: A dual-mode signal amplifying circuit includes: a first and a second input terminals for receiving differential input signals; two output terminals for providing differential output signals; a first through a third current sources; a first switch positioned between the first current source and a first node, and controlled by the first input terminal; a second switch positioned between the first current source and a second node, and controlled by the second input terminal; a third switch positioned between the first node and a fixed-voltage terminal, and controlled by a third node; a fourth switch positioned between the second node and a fixed-voltage terminal, and controlled by the third node; a fifth switch positioned between the second current source and a fixed-voltage terminal, and controlled by the first node; and a sixth switch positioned between the third current source and a fixed-voltage terminal, and controlled by the second node.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: September 1, 2020
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Chao-Huang Wu, Yi-Shao Chang, Han-Chang Kang, Ka-Un Chan
  • Publication number: 20200212845
    Abstract: The present invention discloses a mixer bias circuit including a first reference voltage generation circuit, an amplifier, a first transistor array, a first switch array, a second reference voltage generation circuit, a second transistor array, a second switch array, a first resistive component, and a second resistive component. The mixer bias circuit provides multiple bias voltages by dynamically tracking the common mode voltage of a trans-impedance amplifier (TIA) and compensates for imbalance and mismatch effects by asymmetrically trimming the bias voltages to improve the second-order intercept point of a radio frequency (RF) receiver front-end (RXFE).
    Type: Application
    Filed: December 30, 2019
    Publication date: July 2, 2020
    Inventors: KA-UN CHAN, RONG-FU YEH, CHAO-HUANG WU
  • Patent number: 10700641
    Abstract: The present invention discloses a mixer bias circuit including a first reference voltage generation circuit, an amplifier, a first transistor array, a first switch array, a second reference voltage generation circuit, a second transistor array, a second switch array, a first resistive component, and a second resistive component. The mixer bias circuit provides multiple bias voltages by dynamically tracking the common mode voltage of a trans-impedance amplifier (TIA) and compensates for imbalance and mismatch effects by asymmetrically trimming the bias voltages to improve the second-order intercept point of a radio frequency (RF) receiver front-end (RXFE).
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: June 30, 2020
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Ka-Un Chan, Rong-Fu Yeh, Chao-Huang Wu
  • Publication number: 20190190628
    Abstract: A receiving device comprises a first receiving circuit, for receiving a plurality of signals and comparing a plurality of signal powers of the plurality of signals with a first threshold, to generate a first plurality of comparison results; a second receiving circuit, for receiving the plurality of signals and comparing the plurality of signal powers of the plurality of signals with a second threshold, to generate a second plurality of comparison results, wherein the first threshold is smaller than the second threshold; and a control circuit, coupled to the first receiving circuit and the second receiving circuit, for determining whether an average signal power of the plurality of signals is greater than a reference power according to the first plurality of comparison results and the second plurality of comparison results, to generate a determination result.
    Type: Application
    Filed: August 27, 2018
    Publication date: June 20, 2019
    Inventors: Chao-Huang Wu, Han-Chang Kang, Ka-Un Chan
  • Publication number: 20190140601
    Abstract: A dual-mode signal amplifying circuit includes: a first and a second input terminals for receiving differential input signals; two output terminals for providing differential output signals; a first through a third current sources; a first switch positioned between the first current source and a first node, and controlled by the first input terminal; a second switch positioned between the first current source and a second node, and controlled by the second input terminal; a third switch positioned between the first node and a fixed-voltage terminal, and controlled by a third node; a fourth switch positioned between the second node and a fixed-voltage terminal, and controlled by the third node; a fifth switch positioned between the second current source and a fixed-voltage terminal, and controlled by the first node; and a sixth switch positioned between the third current source and a fixed-voltage terminal, and controlled by the second node.
    Type: Application
    Filed: October 16, 2018
    Publication date: May 9, 2019
    Applicant: Realtek Semiconductor Corp.
    Inventors: Chao-Huang WU, Yi-Shao CHANG, Han-Chang KANG, Ka-Un CHAN
  • Patent number: 8427587
    Abstract: A tracking filter includes a first buffer, an impedance transformer, an inductor, a first capacitive unit, a second capacitive unit and a second buffer. The first buffer has an input terminal for receiving an input signal. The impedance transformer is connected with an output terminal of the first buffer. The inductor is connected with a second terminal of the impedance transformer. The first capacitive unit is interconnected between the impedance transformer and a ground terminal. The second capacitive unit is interconnected between the inductor and the ground terminal. The second buffer is connected with the inductor for generating an output signal. When specified values of the impedance transformer, the first capacitive unit and the second capacitive unit are simultaneously increased, an operating frequency of the output signal is decreased, so that a gain value of the output signal to the input signal is maintained constant.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: April 23, 2013
    Assignee: Sunplus Technology Co., Ltd.
    Inventor: Chao-Huang Wu
  • Publication number: 20110242431
    Abstract: A tracking filter includes a first buffer, an impedance transformer, an inductor, a first capacitive unit, a second capacitive unit and a second buffer. The first buffer has an input terminal for receiving an input signal. The impedance transformer is connected with an output terminal of the first buffer. The inductor is connected with a second terminal of the impedance transformer. The first capacitive unit is interconnected between the impedance transformer and a ground terminal. The second capacitive unit is interconnected between the inductor and the ground terminal. The second buffer is connected with the inductor for generating an output signal. When specified values of the impedance transformer, the first capacitive unit and the second capacitive unit are simultaneously increased, an operating frequency of the output signal is decreased, so that a gain value of the output signal to the input signal is maintained constant.
    Type: Application
    Filed: March 24, 2011
    Publication date: October 6, 2011
    Applicant: Sunplus Technology Co., Ltd.
    Inventor: Chao-Huang Wu
  • Patent number: 7585145
    Abstract: A panel transfer apparatus is provided. The panel transfer apparatus includes a base having a sliding mechanism and a carrier device disposed on the sliding mechanism. The carrier device further includes a plurality of carrier seat, a plurality of sucker sets disposed on the carrier seat, a plurality of sliding rails disposed on the carrier seat, and a plurality of transfer robots disposed on the plurality of sliding rails for placing panels. The panel transfer apparatus provides an. apparatus through which issue of fall-down panels and lowered production yield of the panels, disadvantages of marks and thus uneven brightness left on the panels resulted during panel delivery may be addressed and panels of different sizes may be transported to increase the panel production amount.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: September 8, 2009
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Te-Hsin Huang, Chao-Huang Wu
  • Patent number: 7497317
    Abstract: A conveying and raising apparatus includes a conveying mechanism and a raising mechanism. The conveying mechanism includes a roller for conveying a first object while rotating, and a motor for rotating the roller. The raising mechanism includes a frame installed beside the roller, a plurality of pins fixed on the frame, and an actuator connected to the frame for raising a second object above the plurality of pins from a first height to a second height. The frame has an opening capable of allowing the first object to pass through.
    Type: Grant
    Filed: November 2, 2005
    Date of Patent: March 3, 2009
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Sou-Chen Chang, Chao-Huang Wu
  • Publication number: 20070154297
    Abstract: A panel transfer apparatus is provided. The panel transfer apparatus includes a base having a sliding mechanism and a carrier device disposed on the sliding mechanism. The carrier device further includes a plurality of carrier seat, a plurality of sucker sets disposed on the carrier seat, a plurality of sliding rails disposed on the carrier seat, and a plurality of transfer robots disposed on the plurality of sliding rails for placing panels. The panel transfer apparatus provides an. apparatus through which issue of fall-down panels and lowered production yield of the panels, disadvantages of marks and thus uneven brightness left on the panels resulted during panel delivery may be addressed and panels of different sizes may be transported to increase the panel production amount.
    Type: Application
    Filed: December 29, 2005
    Publication date: July 5, 2007
    Applicant: CHUNGHWA PICTURE TUBES, LTD.
    Inventors: Te-Hsin Huang, Chao-Huang Wu
  • Publication number: 20070098539
    Abstract: A conveying and raising apparatus includes a conveying mechanism and a raising mechanism. The conveying mechanism includes a roller for conveying a first object while rotating, and a motor for rotating the roller. The raising mechanism includes a frame installed beside the roller, a plurality of pins fixed on the frame, and an actuator connected to the frame for raising a second object above the plurality of pins from a first height to a second height. The frame has an opening capable of allowing the first object to pass through.
    Type: Application
    Filed: November 2, 2005
    Publication date: May 3, 2007
    Inventors: Sou-Chen Chang, Chao-Huang Wu
  • Patent number: 7188721
    Abstract: An adjustment apparatus, which is able to adjust a substrate position. The apparatus includes a plurality of transport rails, a plurality of rollers on each transport rail, a pin up device and an adjustment device. The roller is transported the glass substrate, a pin and a joinball of the pin up device are supported and are raised the substrate from the roller. Finally, an adjustment device can adjust the glass substrate.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: March 13, 2007
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Chao-Huang Wu, Shao-Hung Yang