Patents by Inventor Chao-Kai Tu
Chao-Kai Tu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11677594Abstract: The disclosure provides a receiver and an automatic offset cancellation (AOC) method thereof. The receiver includes a receiving channel circuit and an AOC circuit. The receiving channel circuit generates an equalized differential signal including an equalized first-end signal and an equalized second-end signal according to an input differential signal. The AOC circuit detects a peak of the equalized first-end signal to generate a first peak detection result. The AOC circuit detects a peak of the equalized second-end signal to generate a second peak detection result. The AOC circuit compares the first peak detection result with the second peak detection result to generate a comparison result. The AOC circuit compensates a mismatch of an input differential pair in the receiving channel circuit according to the comparison result.Type: GrantFiled: March 29, 2022Date of Patent: June 13, 2023Assignee: Novatek Microelectronics Corp.Inventors: Tien-Chien Lee, Chao-Kai Tu, Sheng Hao Tseng
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Publication number: 20200152115Abstract: A source driver for a panel includes a plurality of driver cells. Each of the driver cells includes an output driver, a plurality of bias voltage generators and a selector. The output driver is configured to output a plurality of display data to the panel. The plurality of bias voltage generators is coupled to the output driver. Each of the bias voltage generators is configured to provide at least one bias voltage for the output driver. The selector, coupled to the output driver, is configured to select the bias voltage from one of the bias voltage generators to be provided for the output driver according to the plurality of display data.Type: ApplicationFiled: November 8, 2018Publication date: May 14, 2020Inventors: Chao-Kai Tu, Yueh-Hsun Tsai, Tzung-Yun Tsai, Kai-Yue Lin, Ying-Hsiang Wang
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Patent number: 9780794Abstract: A clock and data recovery apparatus which includes a voltage controlled delay line (VCDL), a phase detector (PD) and a control voltage generating circuit is provided. The VCDL generates a plurality of clock signals with different phases according to a reference clock signal and a control voltage. The PD detects the phase relationship between a first input signal and a second input signal, and produces a detection result. A data signal or one of the clock signals is used as the first input signal, and one or more of the clock signals is/are used as the second input signal. The control voltage generating circuit generates the control voltage to the VCDL according to the detection result of the PD.Type: GrantFiled: March 11, 2015Date of Patent: October 3, 2017Assignee: Novatek Microelectronics Corp.Inventors: Chao-Kai Tu, Rong-Sing Chu
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Patent number: 9537487Abstract: A data control circuit includes an output stage circuit, a switch circuit, and an impedance module. The output stage circuit outputs a data signal. An input terminal of the switch circuit is coupled to an output terminal of the output stage circuit, and an output terminal of the switch circuit is coupled to a post-stage circuit. According to a control of a control signal, the switch circuit determines whether to transmit the data signal of the output stage circuit to the post-stage circuit. The impedance module is configured in the output stage circuit, configured between the output stage circuit and the switch circuit, or configured in the switch circuit. Here, the impedance module reduces noise flowing from the switch circuit to the output stage circuit.Type: GrantFiled: December 24, 2014Date of Patent: January 3, 2017Assignee: Novatek Microelectronics Corp.Inventors: Tse-Hung Wu, Chao-Kai Tu, Chia-Wei Su
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Publication number: 20160043860Abstract: A clock and data recovery apparatus which includes a voltage controlled delay line (VCDL), a phase detector (PD) and a control voltage generating circuit is provided. The VCDL generates a plurality of clock signals with different phases according to a reference clock signal and a control voltage. The PD detects the phase relationship between a first input signal and a second input signal, and produces a detection result. A data signal or one of the clock signals is used as the first input signal, and one or more of the clock signals is/are used as the second input signal. The control voltage generating circuit generates the control voltage to the VCDL according to the detection result of the PD.Type: ApplicationFiled: March 11, 2015Publication date: February 11, 2016Inventors: Chao-Kai Tu, Rong-Sing Chu
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Publication number: 20150109027Abstract: A data control circuit includes an output stage circuit, a switch circuit, and an impedance module. The output stage circuit outputs a data signal. An input terminal of the switch circuit is coupled to an output terminal of the output stage circuit, and an output terminal of the switch circuit is coupled to a post-stage circuit. According to a control of a control signal, the switch circuit determines whether to transmit the data signal of the output stage circuit to the post-stage circuit. The impedance module is configured in the output stage circuit, configured between the output stage circuit and the switch circuit, or configured in the switch circuit. Here, the impedance module reduces noise flowing from the switch circuit to the output stage circuit.Type: ApplicationFiled: December 24, 2014Publication date: April 23, 2015Inventors: Tse-Hung Wu, Chao-Kai Tu, Chia-Wei Su
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Patent number: 8866529Abstract: An interface circuit includes a receiver, a first terminal resistor, a second terminal resistor, a common mode capacitor, a first switch, a second switch, and a common mode potential adjustment circuit. The receiver includes a first channel for receiving a first channel voltage, and a second channel for receiving a second channel voltage. The common mode capacitor provides a common mode potential. The first switch electrically connects the first terminal resistor to the common mode capacitor, and the second switch electrically connects the second terminal resistor to the common mode capacitor. The common mode potential adjustment circuit is coupled to the first switch, the second switch and the common mode capacitor, and adjusts the common mode potential according to the first channel voltage and the second channel voltage.Type: GrantFiled: March 6, 2013Date of Patent: October 21, 2014Assignee: Novatek Microelectronics Corp.Inventors: Tse-Hung Wu, Chao-Kai Tu
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Publication number: 20140198021Abstract: A display driving apparatus, including an image processor, a timing controller, and a plurality of source drivers, is provided. The image processor determines whether an image frame corresponding to a frame data is a static image and outputs the frame data and a determination result. The timing controller receives the frame data from the image processor and outputs the frame data. The source drivers receive the frame data from the timing controller and drive a display panel according to the frame data. Each of the source drivers includes a memory module configured to store the frame data corresponding to the static image. When the source drivers drive the display panel according to the frame data corresponding to the static image, the image processor stops outputting the frame data to the timing controller, and the timing controller stops outputting the frame data to the source drivers.Type: ApplicationFiled: July 11, 2013Publication date: July 17, 2014Inventors: Chao-Kai Tu, Kuang-Feng Sung, Shun-Hsun Yang, Teng-Jui Yu
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Publication number: 20140176227Abstract: A data control circuit includes an output stage circuit, a switch circuit, and an impedance module. The output stage circuit outputs a data signal. An input terminal of the switch circuit is coupled to an output terminal of the output stage circuit, and an output terminal of the switch circuit is coupled to a post-stage circuit. According to a control of a control signal, the switch circuit determines whether to transmit the data signal of the output stage circuit to the post-stage circuit. The impedance module is configured in the output stage circuit, configured between the output stage circuit and the switch circuit, or configured in the switch circuit. Here, the impedance module reduces noise flowing from the switch circuit to the output stage circuit.Type: ApplicationFiled: July 9, 2013Publication date: June 26, 2014Inventors: Tse-Hung Wu, Chao-Kai Tu, Chia-Wei Su
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Publication number: 20140097889Abstract: An interface circuit includes a receiver, a first terminal resistor, a second terminal resistor, a common mode capacitor, a first switch, a second switch, and a common mode potential adjustment circuit. The receiver includes a first channel for receiving a first channel voltage, and a second channel for receiving a second channel voltage. The common mode capacitor provides a common mode potential. The first switch electrically connects the first terminal resistor to the common mode capacitor, and the second switch electrically connects the second terminal resistor to the common mode capacitor. The common mode potential adjustment circuit is coupled to the first switch, the second switch and the common mode capacitor, and adjusts the common mode potential according to the first channel voltage and the second channel voltage.Type: ApplicationFiled: March 6, 2013Publication date: April 10, 2014Applicant: NOVATEK MICROELECTRONICS CORP.Inventors: Tse-Hung WU, Chao-Kai Tu
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Patent number: RE47977Abstract: A data control circuit includes an output stage circuit, a switch circuit, and an impedance module. The output stage circuit outputs a data signal. An input terminal of the switch circuit is coupled to an output terminal of the output stage circuit, and an output terminal of the switch circuit is coupled to a post-stage circuit. According to a control of a control signal, the switch circuit determines whether to transmit the data signal of the output stage circuit to the post-stage circuit. The impedance module is configured in the output stage circuit, configured between the output stage circuit and the switch circuit, or configured in the switch circuit. Here, the impedance module reduces noise flowing from the switch circuit to the output stage circuit.Type: GrantFiled: December 17, 2018Date of Patent: May 5, 2020Assignee: Novatek Microelectronics Corp.Inventors: Tse-Hung Wu, Chao-Kai Tu, Chia-Wei Su