Patents by Inventor Chao Kai Tung

Chao Kai Tung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11677051
    Abstract: Embodiments described herein are directed towards enhanced systems and methods for applying underfill (UF) material to fill a gap between electrically coupled semiconductor devices in an integrated device. In some embodiments, uncured UF material may be applied to one edge of the gap, and capillary flow may be employed to distribute the uncured UF material into a first portion of the gap. To fill a second portion of the gap, accelerated motion may be employed. For example, the integrated device may be affixed to a centrifuge, and the centrifuge can be used to spin the integrated device to spread the uncured UF material further into the gap. In some embodiments, the accelerated motion may be employed to distribute the uncured UF material substantially uniformly within the gap. Once the uncured UF material has been spread out, one or more curing processes may be employed to cure the sandwiched UF material.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: June 13, 2023
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Daniel Brodoceanu, Zheng Sung Chio, Tennyson Nguty, Chao Kai Tung, Oscar Torrents Abad
  • Patent number: 11579182
    Abstract: Enhanced probe cards, for testing unpackaged semiconductor die including numerous discrete devices (e.g., LEDs), are described. The die includes anodes and cathodes for the LEDs. Via a single touchdown event, the probe card may simultaneously operate each of the LEDs. The LEDs' optical output is measured and the performance of the die is characterized. The probe card includes a conductive first contact and another contact that are fabricated from a conformal sheet or film. Upon the touchdown event, the first contact makes contact with each of the die's anodes and the other contact makes contact with each of the die's cathodes. The vertical and sheet resistance of the contacts are sufficient such that the voltage drop across the vertical dimension of the contacts is approximately an order of magnitude greater than the operating voltage of the LEDs and current-sharing between adjacent LEDs is limited by the sheet resistance.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: February 14, 2023
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Daniel Brodoceanu, Christopher Percival, Zheng Sung Chio, Chao Kai Tung
  • Patent number: 11349053
    Abstract: Embodiments relate to the design of an electronic device capable having flexible interconnects that connect together a first body and a second body of the electronic device. The flexible interconnects allow the electrical device to better withstand thermal-mechanical stress during fabrication of the electronic device and user usage of the electronic device.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: May 31, 2022
    Assignee: Facebook Technologies, LLC
    Inventors: Zheng Sung Chio, Daniel Brodoceanu, Ali Sengül, Oscar Torrents Abad, Jeb Wu, Pooya Saketi, Chao Kai Tung, Tennyson Nguty, Allan Pourchet
  • Patent number: 11296268
    Abstract: A light emitting diode (LED) array is formed by bonding an LED substrate to a backplane substrate via magnetized interconnects. The backplane substrate may include circuits for driving the LED array, and each of the magnetized interconnects electrically connect a LED device to a corresponding circuit of the backplane substrate. The magnetized interconnects may be formed by electrically connecting first structures protruding from the backplane substrate to second structures protruding from the LED substrate. At least one of the first structure and the second structure includes ferromagnetic material configured to secure the first structure to the second structure.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: April 5, 2022
    Assignee: Facebook Technologies, LLC
    Inventors: Ali Sengül, Oscar Torrents Abad, Daniel Brodoceanu, Zheng Sung Chio, Jeb Wu, Chao Kai Tung, Tennyson Nquty, Allan Pourchet
  • Patent number: 11239400
    Abstract: A light-emitting diode (LED) array is formed by bonding an LED chip or wafer to a backplane substrate via curved interconnects. The backplane substrate may include circuits for driving the LED's. One or more curved interconnects are formed on the backplane substrate. A curved interconnect may be electrically connected to a corresponding circuit of the backplane substrate, and may include at least a portion with curvature. The LED chip or wafer may include one or more LED devices. Each LED device may have one or more electrical contacts. The LED chip or wafer is positioned above the backplane substrate to spatially align electrical contacts of the LED devices with the curved interconnects on the backplane substrate. The electrical contacts are bonded to the curved interconnects to electrically connect the LED devices to corresponding circuits of the backplane substrate.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: February 1, 2022
    Assignee: Facebook Technologies, LLC
    Inventors: Zheng Sung Chio, Daniel Brodoceanu, Oscar Torrents Abad, Ali Sengül, Pooya Saketi, Jeb Wu, Chao Kai Tung, Remi Alain Delille, Tennyson Nguty, Allan Pourchet