Abstract: An interconnect fabrication method is disclosed herein that utilizes a disposable etch stop hard mask over a gate structure during source/drain contact formation and replaces the disposable etch stop hard mask with a dielectric feature (in some embodiments, dielectric layers having a lower dielectric constant than a dielectric constant of dielectric layers of the disposable etch stop hard mask) before gate contact formation. An exemplary device includes a contact etch stop layer (CESL) having a first sidewall CESL portion and a second sidewall CESL portion separated by a spacing and a dielectric feature disposed over a gate structure, where the dielectric feature and the gate structure fill the spacing between the first sidewall CESL portion and the second sidewall CESL portion. The dielectric feature includes a bulk dielectric over a dielectric liner. The dielectric liner separates the bulk dielectric from the gate structure and the CESL.

Abstract: An electronic device is provided in this disclosure. The electronic device includes a display panel, a transmission line, a universal motherboard, and an optional panel power management module. The display panel is a first type display panel or a second type display panel. The transmission line is a first transmission line or a second transmission line. The universal motherboard is connected to the first type display panel through the first transmission line, or connected to the second type display panel through the second transmission line. When the display panel is the first type display panel, the panel power management module is connected to the universal motherboard and the first type display panel through the first transmission line, so that the panel power management module provides power management required for the first type display panel according to the universal motherboard.