Patents by Inventor Chao-Kai Zhang

Chao-Kai Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210357145
    Abstract: A data writing method for a rewritable non-volatile memory module is provided according to embodiments of the disclosure. The method includes: writing first-type data into a first physical unit at a first write speed; and writing second-type data into a second physical unit at a second write speed. The first-type data is different from the second-type data, and the first write speed is different from the second write speed.
    Type: Application
    Filed: July 3, 2020
    Publication date: November 18, 2021
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Wei-Cheng Li, Yu-Chung Shen, Wei-Liang Huang, Chao-Kai Zhang
  • Patent number: 11139044
    Abstract: A memory testing method and a memory testing system. The memory testing system includes a host system and a testing device. The host system includes a processor. The testing device is coupled to the host system and a rewritable non-volatile memory module. A first memory controlling circuit unit corresponding to a first type memory storage device in the testing device tests the rewritable non-volatile memory module to obtain first test information. A second memory controlling circuit unit corresponding to a second type memory storage device in the testing device tests the rewritable non-volatile memory module to obtain second test information according to the first test information. The processor determines that whether the rewritable non-volatile memory module is applicable to the second type memory storage device or not according to the first test information and the second test information.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: October 5, 2021
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Siu-Tung Lam, Chih-Hung Chiu, Kun-Tsung Lo, Chao-Kai Zhang
  • Publication number: 20200066366
    Abstract: A memory testing method and a memory testing system. The memory testing system includes a host system and a testing device. The host system includes a processor. The testing device is coupled to the host system and a rewritable non-volatile memory module. A first memory controlling circuit unit corresponding to a first type memory storage device in the testing device tests the rewritable non-volatile memory module to obtain first test information. A second memory controlling circuit unit corresponding to a second type memory storage device in the testing device tests the rewritable non-volatile memory module to obtain second test information according to the first test information. The processor determines that whether the rewritable non-volatile memory module is applicable to the second type memory storage device or not according to the first test information and the second test information.
    Type: Application
    Filed: October 2, 2018
    Publication date: February 27, 2020
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Siu-Tung Lam, Chih-Hung Chiu, Kun-Tsung Lo, Chao-Kai Zhang