Patents by Inventor Chao-Kuei Yeh

Chao-Kuei Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11183392
    Abstract: According to an embodiment of the present disclosure, a method of manufacturing semiconductor device includes: forming a first mandrel and a second mandrel over a mask layer; depositing a spacer layer over the first mandrel and the second mandrel; forming a line-end cut pattern over the spacer layer between the first mandrel and the second mandrel; depositing a protection layer over the line-end cut pattern; etching the protection layer and exposing upper portion of the line-end cut pattern; reducing a width of the line-end cut pattern; etching the spacer layer to expose the first mandrel and the second mandrel; and patterning the mask layer using the etched spacer layer and the reduced line-end cut pattern as an etch mask.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: November 23, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jiann-Horng Lin, Chao-Kuei Yeh, Ying-Hao Wu, Tai-Yen Peng, Chih-Hao Chen, Chih-Sheng Tian
  • Publication number: 20200258754
    Abstract: According to an embodiment of the present disclosure, a method of manufacturing semiconductor device includes: forming a first mandrel and a second mandrel over a mask layer; depositing a spacer layer over the first mandrel and the second mandrel; forming a line-end cut pattern over the spacer layer between the first mandrel and the second mandrel; depositing a protection layer over the line-end cut pattern; etching the protection layer and exposing upper portion of the line-end cut pattern; reducing a width of the line-end cut pattern; etching the spacer layer to expose the first mandrel and the second mandrel; and patterning the mask layer using the etched spacer layer and the reduced line-end cut pattern as an etch mask.
    Type: Application
    Filed: April 28, 2020
    Publication date: August 13, 2020
    Inventors: JIANN-HORNG LIN, CHAO-KUEI YEH, YING-HAO WU, TAI-YEN PENG, CHIH-HAO CHEN, CHIH-SHENG TIAN
  • Patent number: 10636667
    Abstract: A method of manufacturing a semiconductor device includes: forming a first mandrel and a second mandrel over a mask layer; depositing a spacer layer over the first mandrel and the second mandrel; forming a line-end cut pattern over the spacer layer between the first mandrel and the second mandrel; depositing a protection layer over the line-end cut pattern; etching the protection layer on the line-end cut pattern; reducing a width of the line-end cut pattern; etching first horizontal portions of the spacer layer with the reduced line-end cut pattern as an etching mask; removing the first mandrel and the second mandrel; and patterning the mask layer using the etched spacer layer and the etched line-end cut pattern as an etch mask.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: April 28, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jiann-Horng Lin, Chao-Kuei Yeh, Ying-Hao Wu, Tai-Yen Peng, Chih-Hao Chen, Chih-Sheng Tian
  • Patent number: 10340141
    Abstract: An embodiment method includes defining a first mandrel and a second mandrel over a hard mask layer. The method also includes depositing a spacer layer over and along sidewalls of the first mandrel and the second mandrel, and forming a sacrificial material over the spacer layer between the first mandrel and the second mandrel. The sacrificial material includes an inorganic oxide. The method further includes removing first horizontal portions of the spacer layer to expose the first mandrel and the second mandrel. Remaining portions of the spacer layer provide spacers on sidewalls of the first mandrel and the second mandrel. The method further includes removing the first mandrel and the second mandrel and patterning the hard mask layer using the spacers and the sacrificial material as an etch mask.
    Type: Grant
    Filed: July 3, 2017
    Date of Patent: July 2, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tai-Yen Peng, Chao-Kuei Yeh, Ying-Hao Wu, Chih-Hao Chen
  • Publication number: 20190157094
    Abstract: A method of manufacturing a semiconductor device includes: forming a first mandrel and a second mandrel over a mask layer; depositing a spacer layer over the first mandrel and the second mandrel; forming a line-end cut pattern over the spacer layer between the first mandrel and the second mandrel; depositing a protection layer over the line-end cut pattern; etching the protection layer on the line-end cut pattern; reducing a width of the line-end cut pattern; etching first horizontal portions of the spacer layer with the reduced line-end cut pattern as an etching mask; removing the first mandrel and the second mandrel; and patterning the mask layer using the etched spacer layer and the etched line-end cut pattern as an etch mask.
    Type: Application
    Filed: September 4, 2018
    Publication date: May 23, 2019
    Inventors: JIANN-HORNG LIN, CHAO-KUEI YEH, YING-HAO WU, TAI-YEN PENG, CHIH-HAO CHEN, CHIH-SHENG TIAN
  • Publication number: 20190131131
    Abstract: A method of forming a semiconductor device structure is provided. The method includes successively forming first and second hard mask layers over a trench pattern region of a material layer. The second hard mask layer has a first tapered opening corresponding to a portion of the trench pattern region and a passivation spacer is formed on a sidewall of the first tapered opening to form a second tapered opening therein. The method also includes forming a third tapered opening below the second tapered opening and removing a portion of the passivation spacer in a first etching process. The method also includes forming a vertical opening in the first hard mask layer below the bottom of the third tapered opening in a second etching process. The vertical opening has a width that is substantially equal to a bottom width of the third tapered opening.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 2, 2019
    Inventors: Ying-Hao WU, Chao-Kuei YEH, Tai-Yen PENG, Yun-Yu CHEN, Jiann-Horng LIN, Chih-Hao CHEN
  • Patent number: 10276378
    Abstract: A method of forming a semiconductor device structure is provided. The method includes successively forming first and second hard mask layers over a trench pattern region of a material layer. The second hard mask layer has a first tapered opening corresponding to a portion of the trench pattern region and a passivation spacer is formed on a sidewall of the first tapered opening to form a second tapered opening therein. The method also includes forming a third tapered opening below the second tapered opening and removing a portion of the passivation spacer in a first etching process. The method also includes forming a vertical opening in the first hard mask layer below the bottom of the third tapered opening in a second etching process. The vertical opening has a width that is substantially equal to a bottom width of the third tapered opening.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: April 30, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ying-Hao Wu, Chao-Kuei Yeh, Tai-Yen Peng, Yun-Yu Chen, Jiann-Horng Lin, Chih-Hao Chen
  • Publication number: 20180315601
    Abstract: An embodiment method includes defining a first mandrel and a second mandrel over a hard mask layer. The method also includes depositing a spacer layer over and along sidewalls of the first mandrel and the second mandrel, and forming a sacrificial material over the spacer layer between the first mandrel and the second mandrel. The sacrificial material includes an inorganic oxide. The method further includes removing first horizontal portions of the spacer layer to expose the first mandrel and the second mandrel. Remaining portions of the spacer layer provide spacers on sidewalls of the first mandrel and the second mandrel. The method further includes removing the first mandrel and the second mandrel and patterning the hard mask layer using the spacers and the sacrificial material as an etch mask.
    Type: Application
    Filed: July 3, 2017
    Publication date: November 1, 2018
    Inventors: Tai-Yen Peng, Chao-Kuei Yeh, Ying-Hao Wu, Chih-Hao Chen