Abstract: Disclosed is wristband and wrist wearable device, including: a wristband body portion, one end is connected to one end of a device body of a wrist wearable device, and the other end is a free end; and a memory metal portion, which is arranged on the wristband body portion and has an arc-shaped memory state in a natural state, so that the wristband body portion is naturally maintained in an arc shape. The memory metal portion comprises a strip-shaped memory metal piece including a first metal segment, a second metal segment, and a third metal segment that are sequentially connected, the first metal segment and the third metal segment extend along a length direction of the wristband body portion in parallel, the second metal segment is arranged at the free end of the wristband body portion and is provided with at least one bent portion.

Abstract: A detection element and a verification system are disclosed. The detection element includes a detection end for contacting a feature portion of the osteotomy guide tool; and a positioning target connected to the detection end and configured to provide a pose parameter of the feature portion of the osteotomy guide tool in a coordinate system of a trackable element. With this configuration, the osteotomy guide tool can be verified to avoid deformation of the osteotomy guide tool during repeated use or transportation, affecting its positioning accuracy and affecting the operation.

Abstract: The present disclosure discloses a method for automatically identifying south troughs by improved Laplace and relates to the technical field of meteorology. The method includes the following steps: acquiring grid data of a geopotential height field; calculating a gradient field of the geopotential height field in an x direction; searching for a turning point where a gradient value turned from being negative to being positive, and cleaning the gradient field; calculating a divergence of the x direction to obtain an improved Laplacian numerical value L?; performing 0,1 binarization processing on the L? to obtain a black-and-white image and a plurality of targets of potential troughs, merging the black-and-white image and the plurality of targets of the potential troughs by expansion, recovering original scale through erosion, and selecting an effective target through an angle of direction of a contour and an axial ratio.

Abstract: There is provided a display substrate, including: a base; light-emitting units on a side of the base; a flat light-shielding functional layer, including a black matrix and a first planarization layer, on a side of the light-emitting units away from the base, light outgoing openings being provided in the black matrix and being in one-to-one correspondence with the light-emitting units, and the first planarization layer at least filling the light outgoing openings; and a color filter layer, including color filter patterns in one-to-one correspondence with the light outgoing openings, on a side of the flat light-shielding functional layer away from the base, an orthographic projection of each color filter pattern on the base covering an orthographic projection of the light outgoing opening corresponding to the color filter pattern on the base. A method for manufacturing a display substrate, a display panel and a display apparatus are further provided.

Abstract: An osteotomy calibration method, calibration device, and an orthopedic surgery system are provided by present application. Firstly using the osteotomy calibration device to obtain the calculated position information of the current osteotomy plane, and then determining a position error between the calculated position information and a predetermined position information of a planned osteotomy plane, and if the position error exceeds a preset value, calculating and transmitting a relocation information to a robotic arm to control and relocate the robotic arm. By comparing and identifying the position error between the current osteotomy plane formed by the first osteotomy and the planned predetermined osteotomy plane, relocating the robotic arm, and performing a secondary correction of the osteotomy plane. In addition, by relocating the robotic arm and secondary correction of the osteotomy plane, additional bone nails which is to fix the navigation tool to the bone can be avoided.

Abstract: A target detection method based on fusion of vision, lidar and millimeter wave radar comprises: obtaining original data detected by a camera, a millimeter wave radar, and a lidar, and synchronizing the millimeter wave radar, the lidar, and the camera in time and space; performing a calculation on the original data detected by the millimeter wave radar according to a radar protocol; generating a region of interest by using a position, a speed, and a radar reflection area obtained from the calculation; extracting feature maps of a point cloud bird's-eye view and the original data detected by the camera; projecting the region of interest onto the feature maps of the point cloud bird's-eye view and the original data detected by the camera; fusing the feature maps of the point cloud bird's-eye view and the original data detected by the camera, and processing a fused image through a fully connected layer.

Abstract: The present invention relates to the technical field of protein engineering, and, in particular, to a xylanase mutant with improved heat tolerance. The present invention artificially introduces two or three unnatural disulfide bridges into xylanase by site-directed mutagenesis and obtains the mutants XynA1 and XynA2 with improved heat tolerance, especially the mutant XynA2 into which three disulfide bridges are introduced, achieving residual enzyme activity of 75% after treatment at 80° C. for 5 min, 72% higher than the residual enzyme activity of the mutant XynA1. The present invention further obtains, by screening, three mutation sites Q51N, H143K, and Q161F that can significantly increase the heat tolerance of mutants, and introduction of the mutation sites into the XynA1 and XynA2 xylanases, whether at a single point or a combination of two points or a combination of three points, can effectively improve the heat tolerance of the mutants.

Abstract: The present invention relates to the technical field of protein engineering, and, in particular, to a xylanase mutant with improved heat tolerance. The present invention artificially introduces two or three unnatural disulfide bridges into xylanase by site-directed mutagenesis and obtains the mutants XynA1 and XynA2 with improved heat tolerance, especially the mutant XynA2 into which three disulfide bridges are introduced, achieving residual enzyme activity of 75% after treatment at 80° C. for 5 min, 72% higher than the residual enzyme activity of the mutant XynA1. The present invention further obtains, by screening, three mutation sites Q51N, H143K, and Q161F that can significantly increase the heat tolerance of mutants, and introduction of the mutation sites into the XynA1 and XynA2 xylanases, whether at a single point or a combination of two points or a combination of three points, can effectively improve the heat tolerance of the mutants.

Abstract: The present invention relates to the field of genetic engineering, in particular, the present invention relates to a method for producing a phytase variant with an improved thermal stability, and a phytase variant and the use thereof. The phytase variant contains at least one proline modification, compared to the phytase from Escherichia coli and other mutants thereof. The phytase variants with the modification have preferably improved properties, such as the thermal stability, optimal reaction temperature, pH property, specific activity, protease resistance and performance in animal feeds.

Abstract: A zero-crossing voltage detection circuit for detecting a phase voltage of a converter includes a comparator, a first transistor and a second transistor. The first transistor has a first base, a first collector and a first emitter. The first base couples with the first collector. The first emitter receives the phase voltage. The first collector provides a first voltage to a first terminal of the comparator. The second transistor has a second base, a second collector and a second emitter. The second base couples with the first base. The second base couples with the second collector. The second emitter receives a ground voltage. The second collector provides a second voltage to a second terminal of the comparator. The comparator compares the first voltage with the second voltage to generate a zero-crossing voltage signal.

Abstract: The present invention relates to the field of genetic engineering, in particular, the present invention relates to a method for producing a phytase variant with an improved thermal stability, and a phytase variant and the use thereof. The phytase variant contains at least one proline modification, compared to the phytase from Escherichia coli and other mutants thereof. The phytase variants with the modification have preferably improved properties, such as the thermal stability, optimal reaction temperature, pH property, specific activity, protease resistance and performance in animal feeds.

Abstract: The present invention provides a constant on time controller packaged in one single package for controlling a buck converting circuit to convert an input voltage into an output voltage. The constant on time controller includes an input voltage detecting circuit, an on-time determining circuit and a driving circuit. The input voltage detecting circuit receives a bootstrap voltage to generate an input voltage detecting signal indicative of the input voltage. The on-time determining circuit receives the input voltage detecting signal and generates an on-time signal in response to the input voltage detecting signal and the output voltage. The driving circuit controls the buck converting circuit according to the n-time signal.

Abstract: A delay circuit includes a current circuit, a first current mirror circuit, a second current mirror circuit, a self-compensation circuit, and a delay capacitor. A fixed ratio is between the first current and the second current provided by the current circuit. The first current mirror circuit generates a first mirror current in response to the first current. A partial current of the second current flowing through the second current mirror circuit is a base current, and the second current mirror circuit generates a second mirror current in response to the base current. The self-compensation circuit generates a feedback current in response to the second mirror current. The delay capacitor generates a delay signal. The charging current is equal to the second current subtracting the base current. The first mirror current is the sum of the base current, the second mirror current, and the feedback current.

Abstract: A DC-DC converter, adapted to control a converting circuit to convert an input voltage into an output voltage, is disclosed. The converting circuit comprises a switch module and an LC filter, the switch module is coupled to the input voltage, and the LC filter is coupled to the switch module and provides the output voltage. The DC-DC converter comprises a system control circuit, a driver circuit, and an output voltage adjusting circuit. The system control circuit generates a switch control signal according to a reference voltage and a state of the LC filter. The driver circuit controls the switch module according to the switch control signal for adjusting the output voltage in response to the reference voltage. The output voltage adjusting circuit determines whether adjusting the output voltage toward a predetermined adjusting voltage according to an adjusting reference voltage and a detecting voltage indicative of the output voltage.

Abstract: A multiphase converter controller with current balance, configured to control a plural converting circuit to commonly supply an output voltage, is disclosed. The multiphase converter controller comprises a feedback circuit, a fixed on-time circuit, and a multiphase logical circuit. The feedback circuit detects the output voltage to generate a feedback control signal. The fixed on-time circuit generates an on-time signal according to the feedback control signal, and a pulse width of the on-time signal is determined according to a single timer. The multiphase logical circuit chooses a corresponding converting circuit, generates a phase signal according to a sequence of the feedback control signal and controls the corresponding converting circuit according to the on-time signal. Wherein, the fixed on-time circuit determines a correction value according to currents of the plural converting circuit and the phase signal, so as to correct the pulse width of the on-time signal.

Abstract: A buck converting controller, adapted to control a DC-DC buck converting circuit to convert an input voltage into an output voltage, is disclosed. The buck converting controller comprises a feedback control circuit, an off-time determination circuit and a load control circuit. The feedback control circuit turns on and off a high-side transistor and a low-side transistor of the DC-DC buck converting circuit in response to a feedback signal indicative of the output voltage. The off-time determination circuit determines a preset off-time period according to the input voltage and the output voltage and generates an off notice signal according to the preset off-time period. The load control circuit is coupled to the DC-DC buck converting circuit and determines whether to release an electronic energy stored in the DC-DC buck converting circuit according to the off notice signal.

Abstract: A level shift circuit and a DC-DC buck converter controller for using the same are disclosed. The level shift circuit is capable of detecting a state of a converting circuit, and avoids a current leakage when determining that the converting circuit is operating under a light-load. Therefore, the level shift circuit and the DC-DC converting controller provided by the present invention can reduce power consumption under the light-load and have power-saving advantage.

Abstract: A zero-crossing voltage detection circuit for detecting a phase voltage of a converter includes a comparator, a first transistor and a second transistor. The first transistor has a first base, a first collector and a first emitter. The first base couples with the first collector. The first emitter receives the phase voltage. The first collector provides a first voltage to a first terminal of the comparator. The second transistor has a second base, a second collector and a second emitter. The second base couples with the first base. The second base couples with the second collector. The second emitter receives a ground voltage. The second collector provides a second voltage to a second terminal of the comparator. The comparator compares the first voltage with the second voltage to generate a zero-crossing voltage signal.

Abstract: A programmable on-time period of a DC to DC buck converting controller is adjusted according to a level of a preset output voltage or a reference signal. Therefore, the DC to DC buck converting controller of the present invention is suitable for any applications with different requests of output voltages or different operating mode.

Abstract: A constant on time control circuit, configured to control a converting circuit to transform an input voltage into a stable output voltage, is disclosed. The constant on time control circuit comprises a comparing circuit and a logic circuit. The comparing circuit compares a reference signal and a voltage signal indicative of the output voltage and accordingly outputs a compared result signal. The logic circuit periodically controls the converting circuit to perform voltage transformation and makes a time period of a duty cycle in every cycle being substantially constant. A start point in time of every cycle is determined according to the compared result signal. The comparing circuit comprises a differential pair, a base current source and an extra current source. The base current source provides a bias current to the differential pair. The extra current source provides a substantial ramp current to one channel in the differential pair.