Patents by Inventor Chao Sheng WANG

Chao Sheng WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11995388
    Abstract: An integrated circuit includes a first active region of a first set of transistors of a first type, a second active region of a second set of transistors of the first type, a third active region of a third set of transistors of the first type, a fourth active region of a fourth set of transistors of the first type and a fifth active region of a fifth set of transistors of a second type. The first, second, fourth and fifth active region have a first width in a second direction, and are on a first level. The third active region is on the first level, and has a second width different from the first width. The second active region is adjacent to the first boundary, and is separated from the first active region in the second direction. The fourth active region is adjacent to the second boundary.
    Type: Grant
    Filed: May 15, 2023
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Sheng Wang, Chao Yuan Cheng, Chien-Chi Tien, Yangsyu Lin
  • Patent number: 11978664
    Abstract: A method includes forming a first conductive feature over a semiconductor substrate, forming an ILD layer over the first conductive feature, patterning the ILD layer to form a trench, and forming a conductive layer over the patterned ILD layer to fill the trench. The method further includes polishing the conductive layer to form a via contact configured to interconnect the first conductive feature with a second conductive feature, where polishing the conductive layer exposes a top surface of the ILD layer, polishing the exposed top surface of the ILD layer, such that a top portion of the via contact protrudes from the exposed top surface of the ILD layer, and forming the second conductive feature over the via contact, such that the top portion of the via contact extends into the second conductive feature.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pang-Sheng Chang, Chao-Hsun Wang, Kuo-Yi Chao, Fu-Kai Yang, Mei-Yun Wang, Li-Chieh Wu, Chun-Wei Hsu
  • Publication number: 20240131808
    Abstract: A tape laying device includes a tape transmission mechanism, a compaction head mechanism, a cutter mechanism, a heating mechanism and a motion mechanism. The tape transmission mechanism is configured to transmit the pre-impregnated tape. The compaction head mechanism, connected with the tape transmission mechanism, is configured to depress and drive the pre-impregnated tape transmitted by the tape transmission mechanism to follow a moving path so as to adhere the pre-impregnated tape onto the mould surface. The cutter mechanism is configured to cut the pre-impregnated tape. The heating mechanism, disposed downstream to the cutter mechanism, is configured to heat the pre-impregnated tape. The motion mechanism is used to have the cutter mechanism having an active path to move toward the moving path while the cutter mechanism cuts the pre-impregnated tape.
    Type: Application
    Filed: December 7, 2022
    Publication date: April 25, 2024
    Inventors: TENG-YEN WANG, SHUN-SHENG KO, MIAO-CHANG WU, TUNG-YING LIN, CHAO-HONG HSU
  • Publication number: 20240081055
    Abstract: A semiconductor structure includes a substrate. The substrate is divided into a first element region, a second element region and a boundary region. The boundary region is disposed between the first element region and a second element region. A first mask structure covers the first element region. A second mask structure is disposed in the second element region. A logic gate structure is disposed within the second element region.
    Type: Application
    Filed: September 27, 2022
    Publication date: March 7, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hsuan-Kai Wang, Chao-Sheng Cheng, Chi-Cheng Huang
  • Publication number: 20180035196
    Abstract: A new self-adaptive earcap belonging t the technical field of headsets is provided, including an earcap body, wherein the earcap body is made of soft silicone materials. A small boss is provided on a top surface of the earcap body, and a built-in chamber for receiving an in-ear earphone is provided inside the earcap body. A large circular opening for inserting in the in-ear earphone is provided on a bottom of the earcap body; and a small circular opening for inserting in the in-ear earphone is provided on a top of the earcap body. An elastic chamber is provided on a top of the built-in chamber, and the elastic chamber is provided below the small boss. The whole body of the earcap is made of soft silicone material by integral forming and has good elastic performance.
    Type: Application
    Filed: July 4, 2016
    Publication date: February 1, 2018
    Inventors: Siu Chung Yeung, Jian LIAO, Chao Sheng WANG