Patents by Inventor Chao-Shuo CHEN

Chao-Shuo CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240312990
    Abstract: A semiconductor device with an isolation structure and a method of fabricating the same are disclosed. The semiconductor device includes first and second fin structures disposed on a substrate and first and second pairs of gate structures disposed on the first and second fin structures. The first end surfaces of the first pair of gate structures face second end surfaces of the second pair of gate structure. The first and second end surfaces of the first and second pair of gate structures are in physical contact with first and second sidewalls of the isolation structure, respectively. The semiconductor device further includes an isolation structure interposed between the first and second pairs of gate structures. An aspect ratio of the isolation structure is smaller than a combined aspect ratio of the first pair of gate structures.
    Type: Application
    Filed: May 29, 2024
    Publication date: September 19, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Shuo CHEN, Chia-Der Chang, Yi-Jing Lee
  • Patent number: 12057449
    Abstract: A semiconductor device with an isolation structure and a method of fabricating the same are disclosed. The semiconductor device includes first and second fin structures disposed on a substrate and first and second pairs of gate structures disposed on the first and second fin structures. The first end surfaces of the first pair of gate structures face second end surfaces of the second pair of gate structure. The first and second end surfaces of the first and second pair of gate structures are in physical contact with first and second sidewalls of the isolation structure, respectively. The semiconductor device further includes an isolation structure interposed between the first and second pairs of gate structures. An aspect ratio of the isolation structure is smaller than a combined aspect ratio of the first pair of gate structures.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: August 6, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chao-Shuo Chen, Chia-Der Chang, Yi-Jing Lee
  • Patent number: 11664423
    Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, an insulating stack formed over the substrate, a vertical structure formed through the insulating stack, a source/drain region formed over the vertical structure, and an isolation structure formed adjacent to the source/drain region and protruding the insulating stack. The source/drain region can include a first side surface and a second side surface. A lateral separation between the first side surface and the vertical structure can be greater than an other lateral separation between the second side surface and the vertical structure.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: May 30, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chao-Shuo Chen, Chia-Der Chang, Yi-Jing Lee
  • Patent number: 11521969
    Abstract: A semiconductor device with an isolation structure and a method of fabricating the same are disclosed. The semiconductor device includes first and second fin structures disposed on a substrate and first and second pairs of gate structures disposed on the first and second fin structures. The first end surfaces of the first pair of gate structures face second end surfaces of the second pair of gate structure. The first and second end surfaces of the first and second pair of gate structures are in physical contact with first and second sidewalls of the isolation structure, respectively. The semiconductor device further includes an isolation structure interposed between the first and second pairs of gate structures. An aspect ratio of the isolation structure is smaller than a combined aspect ratio of the first pair of gate structures.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: December 6, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chao-Shuo Chen, Chia-Der Chang, Yi-Jing Lee
  • Publication number: 20220367633
    Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, an insulating stack formed over the substrate, a vertical structure formed through the insulating stack, a source/drain region formed over the vertical structure, and an isolation structure formed adjacent to the source/drain region and protruding the insulating stack. The source/drain region can include a first side surface and a second side surface. A lateral separation between the first side surface and the vertical structure can be greater than an other lateral separation between the second side surface and the vertical structure.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chao-Shuo CHEN, Chia-Der CHANG, Yi-Jing LEE
  • Publication number: 20220367456
    Abstract: A semiconductor device with an isolation structure and a method of fabricating the same are disclosed. The semiconductor device includes first and second fin structures disposed on a substrate and first and second pairs of gate structures disposed on the first and second fin structures. The first end surfaces of the first pair of gate structures face second end surfaces of the second pair of gate structure. The first and second end surfaces of the first and second pair of gate structures are in physical contact with first and second sidewalls of the isolation structure, respectively. The semiconductor device further includes an isolation structure interposed between the first and second pairs of gate structures. An aspect ratio of the isolation structure is smaller than a combined aspect ratio of the first pair of gate structures.
    Type: Application
    Filed: July 29, 2022
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chao-Shuo CHEN, Chia-Der CHANG, Yi-Jing LEE
  • Publication number: 20220059653
    Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, an insulating stack formed over the substrate, a vertical structure formed through the insulating stack, a source/drain region formed over the vertical structure, and an isolation structure formed adjacent to the source/drain region and protruding the insulating stack. The source/drain region can include a first side surface and a second side surface. A lateral separation between the first side surface and the vertical structure can be greater than an other lateral separation between the second side surface and the vertical structure.
    Type: Application
    Filed: August 18, 2020
    Publication date: February 24, 2022
    Applicant: Taian Semiconductor Manufacturing Co., Ltd.
    Inventors: Chao-Shuo CHEN, Chia-Der Chang, Yi-Jing Lee
  • Publication number: 20210233906
    Abstract: A semiconductor device with an isolation structure and a method of fabricating the same are disclosed. The semiconductor device includes first and second fin structures disposed on a substrate and first and second pairs of gate structures disposed on the first and second fin structures. The first end surfaces of the first pair of gate structures face second end surfaces of the second pair of gate structure. The first and second end surfaces of the first and second pair of gate structures are in physical contact with first and second sidewalls of the isolation structure, respectively. The semiconductor device further includes an isolation structure interposed between the first and second pairs of gate structures. An aspect ratio of the isolation structure is smaller than a combined aspect ratio of the first pair of gate structures.
    Type: Application
    Filed: July 23, 2020
    Publication date: July 29, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chao-Shuo CHEN, Chia-Der CHANG, Yi-Jing LEE