Patents by Inventor Chao-Sung Lai

Chao-Sung Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230158230
    Abstract: An infusion apparatus and a method for testing extravasation are provided. The infusion apparatus includes a liquid driver, a detection unit, and a controller. The controller controls the liquid driver to be operated, so that an input liquid provided by a infusion supply unit is injected into a living body through a tube and a needle, and a blood return detecting procedure is performed. The blood return detecting procedure includes a stop driving step implemented by controlling the liquid driver to stop operating; and a determining step implemented by controlling the detection unit to test a state of a section of the tube adjacent to the needle to generate a detected signal, and determining whether or not the blood of the living body returns to the tube according to the detected signal.
    Type: Application
    Filed: October 4, 2022
    Publication date: May 25, 2023
    Inventors: SHIN-YU LIEN, CHAO-SUNG LAI, YA-JU CHANG
  • Patent number: 11583848
    Abstract: The present invention discloses a nanoparticle control and detection system and operating method thereof. The present invention controls and detects the nanoparticles in the same device. The device comprises a first transparent electrode, a photoconductive layer, a spacer which is deposed on the edge of the photoconductive layer and a second transparent electrode. The aforementioned device controls and detects the nanoparticles by applying AC/DC bias and AC/DC light source to the transparent electrode.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: February 21, 2023
    Assignee: CHANG GUNG UNIVERSITY
    Inventors: Chia-Ming Yang, Chao-Sung Lai, Yu-Ping Chen, Min-Hsien Wu
  • Publication number: 20210016267
    Abstract: The present invention discloses a nanoparticle control and detection system and operating method thereof. The present invention controls and detects the nanoparticles in the same device. The device comprises a first transparent electrode, a photoconductive layer, a spacer which is deposed on the edge of the photoconductive layer and a second transparent electrode. The aforementioned device controls and detects the nanoparticles by applying AC/DC bias and AC/DC light source to the transparent electrode.
    Type: Application
    Filed: September 4, 2019
    Publication date: January 21, 2021
    Inventors: CHIA-MING YANG, CHAO-SUNG LAI, YU-PING CHEN, MIN-HSIEN WU
  • Publication number: 20200371056
    Abstract: A gas sensing device comprises a silicon substrate, an insulating layer, a plasma treatment layer, a metal electrode and a sensing layer. The insulating layer is formed on the silicon substrate. The plasma treatment layer is formed on the insulating layer. The metal electrode is formed on the portion of the plasma treatment layer. The sensing layer is formed on a surface of the metal electrode and the plasma treatment layer. Through plasma treatment for the substrate and printing graphene film on the substrate and the electrode, the adsorption characteristics of gas selection ratio for graphene is improved, and the processing time of the plasma treatment is adjusted to optimize the sensing characteristics.
    Type: Application
    Filed: September 9, 2019
    Publication date: November 26, 2020
    Inventors: CHAO-SUNG LAI, CHIA-MING YANG, TSUNG-CHENG CHEN, YU-CHENG YANG
  • Patent number: 10551340
    Abstract: The present invention provides capacitor-based fluid sensing units. The capacitor-based fluid sensing unit comprises a substrate, a first electrode configured on the substrate, a sensing layer configured on the first electrode, a second electrode configured on the sensing layer. More particularly, the second electrode is a porous electrode, while the sensing layer is made of a porous dielectric material and has a thickness between 50 nm and 5 mm. Permittivity of the sensing layer changes as fluid permeates from the second electrode to the sensing layer. The subsequent change in capacitance of the capacitor-based fluid sensing unit is used to determine the volume of the fluid.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: February 4, 2020
    Assignee: CHANG GUNG UNIVERSITY
    Inventors: Chao-Sung Lai, Chia-Ming Yang, Hsin-Yin Peng, Wei-Yin Zeng, Chun-Hui Chen
  • Patent number: 10473613
    Abstract: Light-addressable potentiometric sensing units are provided. A light-addressable potentiometric sensing unit comprises a conductive substrate, a metal oxide semiconductor layer, and a sensing layer. The metal oxide semiconductor layer is made of indium gallium zinc oxide, indium gallium oxide, indium zinc oxide, indium oxide co-doped with tin and zinc, tin oxide, or zinc oxide. The wide-band gap characteristic of the metal oxide semiconductor layer enables the light-addressable potentiometric sensing unit to resist the interference from visible light. The light-addressable potentiometric sensing unit therefore exhibits a more stable performance.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: November 12, 2019
    Assignee: CHANG GUNG UNIVERSITY
    Inventors: Chao-Sung Lai, Chia-Ming Yang, Chun-Hui Chen, Tsung-Cheng Chen
  • Patent number: 10396160
    Abstract: A semiconductor structure having a multiple-porous graphene layer includes a sapphire substrate, a single or multiple layer porous graphene film, and a gallium nitride layer. A fabrication method for forming the semiconductor structure having a single or multiple layer porous graphene film, includes: firstly, growing up the graphene on the copper foil; then, using the acetone and isopropyl alcohol to wash the sapphire substrate, and then using the nitrogen flow to dry up; transferring the graphene onto the semiconductor substrate, using the Poly(methyl methacrylate) to fix the single or multiple layer porous graphene film, and using the acetone to wash up; using the photolithography process to etch the whole surface of the multiple-porous graphene layer; and, using the metalorganic chemical vapor deposition to deposit gallium nitride on the single or multiple layer porous graphene film and the sapphire substrate.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: August 27, 2019
    Assignee: CHANG GUNG UNIVERSITY
    Inventors: Chao-Sung Lai, Cher-Ming Tan, Preetpal Singh
  • Publication number: 20190035907
    Abstract: Disclosed is a method for obtaining a field effect transistor, including steps of: —forming a multi-layer graphene stack on a face of a base substrate; —depositing a source and a drain electrode on the multi-layer graphene stack; —forming a conductive multi-layer graphene block by lithography and etching process; —fluorinating the graphene block, using the source and d rain electrodes as a fluorination-protective mask, during a predetermined period and at a predetermined temperature, such that an upper part of the graphene block is converted into fluorographene over a given thickness portion, to form a dielectric element with in the graphene block; —depositing a gate electrode on the dielectric element.
    Type: Application
    Filed: January 24, 2017
    Publication date: January 31, 2019
    Inventors: Mohamed BOUTCHICH, Abdelkarim OUERGHI, Chao-Sung LAI, Kuan-I HO
  • Publication number: 20180097066
    Abstract: The present invention provides a semiconductor structure having a multiple-porous graphene layer, comprising a semiconductor substrate, a multiple-porous graphene layer, and a gallium nitride layer. And, the present invention provides that the fabrication method for forming the semiconductor structure having a multiple-porous graphene layer, comprises: firstly, growing up the graphene on the copper foil; then, using the acetone and isopropyl alcohol to wash the semiconductor substrate, and then using the nitrogen flow to dry up; transferring the graphene onto the semiconductor substrate, using the Poly(methyl methacrylate)to fix the multiple-porous graphene layer, and using the acetone to wash up; using the photolithography process to etch the whole surface of the multiple-porous graphene layer; and, using the metalorganic chemical vapor deposition to deposit gallium nitride on the multiple-porous graphene layer and the semiconductor substrate.
    Type: Application
    Filed: January 5, 2017
    Publication date: April 5, 2018
    Inventors: Chao-Sung LAI, Cher-Ming TAN, Preetpal SINGH
  • Patent number: 9922803
    Abstract: The invention provides a plasma processing device, wherein the upper electrode and the lower electrode are in the vacuum chamber. The chip is placed in the lower electrode. The first plate is placed between the upper electrode and the lower electrode, and the first plate includes a plurality of first voids. The second plate is placed between the first plate and the lower electrode, and the second plate includes a plurality of second voids. The high frequency power is provided by the upper electrode and the lower electrode in the vacuum chamber, and the plasma is generated between the third plate and the upper electrode. The plasma is filtered by the third void, the first void, and the second void.
    Type: Grant
    Filed: October 17, 2012
    Date of Patent: March 20, 2018
    Assignee: CHANG GUNG UNIVERSITY
    Inventors: Chi-Hsien Huang, Chao-Sung Lai, Chien Chou, Chu-Fa Chan
  • Publication number: 20180074002
    Abstract: The present invention provides capacitor-based fluid sensing units. The capacitor-based fluid sensing unit comprises a substrate, a first electrode configured on the substrate, a sensing layer configured on the first electrode, a second electrode configured on the sensing layer. More particularly, the second electrode is a porous electrode, while the sensing layer is made of a porous dielectric material and has a thickness between 50 nm and 5 mm. Permittivity of the sensing layer changes as fluid permeates from the second electrode to the sensing layer. The subsequent change in capacitance of the capacitor-based fluid sensing unit is used to determine the volume of the fluid.
    Type: Application
    Filed: January 13, 2017
    Publication date: March 15, 2018
    Inventors: CHAO-SUNG LAI, CHIA-MING YANG, HSIN-YIN PENG, WEI-YIN ZENG, CHUN-HUI CHEN
  • Publication number: 20170176376
    Abstract: Light-addressable potentiometric sensing units are provided. A light-addressable potentiometric sensing unit comprises a conductive substrate, a metal oxide semiconductor layer, and a sensing layer. The metal oxide semiconductor layer is made of indium gallium zinc oxide, indium gallium oxide, indium zinc oxide, indium oxide co-doped with tin and zinc, tin oxide, or zinc oxide. The wide-band gap characteristic of the metal oxide semiconductor layer enables the light-addressable potentiometric sensing unit to resist the interference from visible light. The light-addressable potentiometric sensing unit therefore exhibits a more stable performance.
    Type: Application
    Filed: August 15, 2016
    Publication date: June 22, 2017
    Inventors: CHAO-SUNG LAI, CHIA-MING YANG, CHUN-HUI CHEN, TSUNG-CHENG CHEN
  • Patent number: 9105505
    Abstract: A memory cell with a recessed gate includes a semiconductor substrate, a shallow trench isolation, an active region, a gate electrode, a halogen-doped dielectric layer and at least a capacitor. The shallow trench isolation is disposed in the semiconductor substrate in order to define the active region. A source region and a drain region are respectively disposed on each end of the active region along a first direction. A gate trench is formed in the semiconductor substrate between the source region and the drain region, wherein the gate trench includes a sidewall portion and a curved-bottom surface. The curved-bottom surface has a convex profile when viewed from a cross-sectional view taken along a second direction perpendicular to the first direction. The gate electrode is disposed in the gate trench and the halogen-doped dielectric layer is disposed between the gate electrode and the semiconductor substrate.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: August 11, 2015
    Assignee: INOTERA MEMORIES, INC.
    Inventors: Chien-Chi Lee, Chia-Ming Yang, Wei-Ping Lee, Hsin-Huei Chen, Chih-Yuan Hsiao, Ping Kao, Kai-Lun Chiang, Chao-Sung Lai, Jer-Chyi Wang
  • Patent number: 8901678
    Abstract: A light-assisted biochemical sensor based on a light addressable potentiometric sensor is disclosed. The light-assisted biochemical sensor comprises a semiconductor substrate and a sensing layer, which are used to detect the specific ion concentration or the biological substance concentration of a detected solution. Lighting elements fabricated directly on the back surface of the semiconductor substrate directly illuminate the light to the semiconductor substrate, so as to enhance the photoconduction property of the semiconductor substrate. And then, the hysteresis and the sensing sensitivity of the light-assisted biochemical sensor are respectively reduced and improved. In addition, due to its characteristics of integration, the light-assisted biochemical sensor not only reduces the fabrication cost but also has portable properties and real-time detectable properties. As a result, its detection range and the application range are wider.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: December 2, 2014
    Assignee: Chang Gung University
    Inventors: Liann-Be Chang, Chao-Sung Lai, Po-Chuan Chen
  • Publication number: 20140312401
    Abstract: A memory cell with a recessed gate includes a semiconductor substrate, a shallow trench isolation, an active region, a gate electrode, a halogen-doped dielectric layer and at least a capacitor. The shallow trench isolation is disposed in the semiconductor substrate in order to define the active region. A source region and a drain region are respectively disposed on each end of the active region along a first direction. A gate trench is formed in the semiconductor substrate between the source region and the drain region, wherein the gate trench includes a sidewall portion and a curved-bottom surface. The curved-bottom surface has a convex profile when viewed from a cross-sectional view taken along a second direction perpendicular to the first direction. The gate electrode is disposed in the gate trench and the halogen-doped dielectric layer is disposed between the gate electrode and the semiconductor substrate.
    Type: Application
    Filed: September 12, 2013
    Publication date: October 23, 2014
    Applicant: INOTERA MEMORIES, INC.
    Inventors: Chien-Chi Lee, Chia-Ming Yang, Wei-Ping Lee, Hsin-Huei Chen, Chih-Yuan Hsiao, Ping Kao, Kai-Lun Chiang, Chao-Sung Lai, Jer-Chyi Wang
  • Patent number: 8741679
    Abstract: The NH3 plasma treatment by remote plasma is firstly proposed to replace the covalent bonding process during surface modification procedure that for amine bond generation.
    Type: Grant
    Filed: May 8, 2012
    Date of Patent: June 3, 2014
    Assignee: Chang Gung University
    Inventors: Chao-Sung Lai, Jau-Song Yu, Yu-Sun Chang, Po-Lung Yang, Tseng-Fu Lu, Yi-Ting Lin, Wen-Yu Chuang, Ting-Chun Yu, I-Shun Wang, Jyh-Ping Chen, Chou Chien
  • Patent number: 8691705
    Abstract: A method of patterning a metal alloy material layer having hafnium and molybdenum. The method includes forming a patterned mask layer on a metal alloy material layer having hafnium and molybdenum on a substrate. The patterned mask layer is used as a mask and an etching process is performed using an etchant on the metal alloy material layer having hafnium and molybdenum so as to form a metal alloy layer having hafnium and molybdenum. The etchant includes at least nitric acid, hydrofluoric acid and sulfuric acid. The patterned mask layer is removed.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: April 8, 2014
    Assignee: Nanya Technology Corporation
    Inventors: Chih-Wei Huang, Chao-Sung Lai, Hsing-Kan Peng, Chung-Yuan Lee, Shian-Jyh Lin
  • Publication number: 20140060740
    Abstract: The invention provides a plasma processing device, wherein the upper electrode and the lower electrode are in the vacuum chamber. The chip is placed in the lower electrode. The first plate is placed between the upper electrode and the lower electrode, and the first plate includes a plurality of first voids. The second plate is placed between the first plate and the lower electrode, and the second plate includes a plurality of second voids. The high frequency power is provided by the upper electrode and the lower electrode in the vacuum chamber, and the plasma is generated between the third plate and the upper electrode. The plasma is filtered by the third void, the first void, and the second void.
    Type: Application
    Filed: October 17, 2012
    Publication date: March 6, 2014
    Applicant: Chang Gung University
    Inventors: Chi-Hsien HUANG, Chao-Sung LAI, Chien CHOU, Chu-Fa CHAN
  • Publication number: 20130260479
    Abstract: A detecting device is used for detecting existence of target biomolecules in a specimen with use of antibody complexes labeled with fluorescent molecules. The detecting device includes a capture member coated with capture antibodies for immobilizing the antibody complexes on the capture member when the target biomolecules exist in the specimen, a light emitting unit emitting a beam for exciting the fluorescence molecules to generate a fluorescence signal, and a signal processing unit for receiving the fluorescence signal and determining existence of the target biomolecules in the specimen based upon receipt of the fluorescence signal.
    Type: Application
    Filed: April 1, 2013
    Publication date: October 3, 2013
    Applicant: CHANG GUNG UNIVERSITY
    Inventors: Chien Chou, Ying-Feng Chang, Li-Chen Su, Yi-Tsen Lu, Jau-Song Yu, Yu-Sun Chang, Chao-Sung Lai, Ying-Chang Li
  • Patent number: 8441080
    Abstract: A sensing device includes: a semiconductor layer of a field effect semiconductor having upper and lower surfaces; a conductive layer formed on the lower surface of the semiconductor layer; and a sensor layer of an insulator formed on the upper surface of the semiconductor layer. The insulator is made from lanthanide-titanium oxide.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: May 14, 2013
    Inventors: Tung-Ming Pan, Min-Hsien Wu, Ming-De Huang, Chao-Sung Lai