Abstract: An antenna assembly includes a patch antenna, a metal layer, and a feed-in signal layer. The metal layer is disposed on a side of the patch antenna and includes a first slot and a second slot. The feed-in signal layer is disposed on a side of the metal layer opposite the second antenna and includes a transmitting port, a receiving port, a hybrid coupler, and two microstrips. The transmitting port and the receiving port are connected to the hybrid coupler, and the two microstrips are extended in the direction away from the hybrid coupler. Projections of two ends of the two microstrips onto the metal layer are overlapped with the first slot and the second slot. An antenna array is also mentioned.

Abstract: A display may include an array of pixels such as light-emitting diode pixels. The pixels may include multiple circuitry decks that each include one or more circuit components such as transistors, capacitors, and/or resistors. The circuitry decks may be vertically stacked. Each circuitry deck may include a planarization layer formed from a siloxane material that conforms to underlying components and provides a planar upper surface. In this way, circuitry components may be vertically stacked to mitigate the size of each pixel footprint. The circuitry components may include capacitors that include both a high-k dielectric layer and a low-k dielectric layer. The display pixel may include a via with a width of less than 1 micron.

Abstract: Optical devices and methods of manufacture are presented in which a multi-tier connector is utilized to transmit and receive optical signals to and from an optical device. In embodiments a multi-tier connection unit receives optical signals from outside of an optical device, wherein the optical signals are originally in multiple levels. The multi-tier connection unit then routes the optical signals into a single level of optical components.

Abstract: A device structure includes: an interposer including metal wiring structures and optical waveguides that are embedded in interlayer dielectric layers, wherein the interposer includes a stepped outer sidewall including an outermost vertical surface segment, a laterally-recessed sidewall segment that is laterally recessed relative to the outermost vertical surface segment, and a connecting horizontal surface segment that connects the outermost vertical surface segment and the laterally-recessed vertical sidewall segment; and a fiber access unit having a first end that is optically coupled to a subset of the optical waveguides through at least one optical glue portion that is interposed between the fiber access unit and the laterally-recessed sidewall segment of the stepped outer sidewall.

Abstract: Semiconductor structures and formation processes thereof are provided. A semiconductor structure of the present disclosure includes a semiconductor substrate, a plurality of transistors disposed on the semiconductor substrate and comprising a plurality of gate structures extending lengthwise along a first direction, a metallization layer disposed over the plurality of transistors, the metallization layer comprising a plurality of metal layers and a plurality of contact vias, a dielectric layer over the metallization layer, a plurality of dielectric fins extending parallel along the first direction and disposed over the dielectric layer, a semiconductor layer disposed conformally over the plurality of dielectric fins, a source contact and a drain contact disposed directly on the semiconductor layer, and a gate structure disposed over the semiconductor layer and between the source contact and the drain contact.

Abstract: Semiconductor device structures with a gate structure having different profiles at different portions of the gate structure may include a fin structure on a substrate, a source/drain structure on the fin structure, and a gate structure over the fin structure and along a sidewall of the fin. The source/drain structure is proximate the gate structure. The gate structure has a top portion having a first sidewall profile and a bottom portion having a second sidewall profile different from the first sidewall profile.

Abstract: The present disclosure provides an optical element driving mechanism, which includes a movable part, a fixed assembly, and a driving assembly. The movable part is configured to be connected to an optical element. The fixed assembly has an opening for allowing a light beam along an optical axis to pass, and the movable part is movable relative to the fixed assembly. The driving assembly is configured to drive the movable part to move relative to the fixed assembly. The optical element driving mechanism further includes a recovery assembly configured to position the movable part in a first position when the movable part is not driven by the driving assembly.

Abstract: An optical element driving mechanism includes a movable assembly, a fixed assembly, and a driving assembly. The movable assembly is configured to be connected to an optical element. The movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly in a range of motion. The optical element driving mechanism further includes a positioning assembly configured to position the movable assembly at a predetermined position relative to the fixed assembly when the driving assembly is not operating.

Abstract: A package includes an optical engine attached to a package substrate, wherein the optical engine includes a first waveguide; and a waveguide structure attached to the package substrate adjacent the optical engine, wherein the waveguide structure includes a second waveguide within a transparent block, wherein a first end of the second waveguide is optically coupled to the first waveguide, wherein the waveguide structure is configured to be connected to an optical fiber component such that a second end of the second waveguide is optically coupled to an optical fiber of the optical fiber component.

Abstract: SRAM designs based on GAA transistors are disclosed that provide flexibility for increasing channel widths of transistors at scaled IC technology nodes and relax limits on SRAM performance optimization imposed by FinFET-based SRAMs. GAA-based SRAM cells described have active region layouts with active regions shared by pull-down GAA transistors and pass-gate GAA transistors. A width of shared active regions that correspond with the pull-down GAA transistors are enlarged with respect to widths of the shared active regions that correspond with the pass-gate GAA transistors. A ratio of the widths is tuned to obtain ratios of pull-down transistor effective channel width to pass-gate effective channel width greater than 1, increase an on-current of pull-down GAA transistors relative to an on-current of pass-gate GAA transistors, decrease a threshold voltage of pull-down GAA transistors relative to a threshold voltage of pass-gate GAA transistors, and/or increases a ? ratio of an SRAM cell.

Abstract: An optical system is provided, including a housing, an optical element, a first movable part, a driving assembly, and a temperature adjusting module. The optical element is disposed on the housing. The first movable part is movably connected to the housing. The driving assembly is configured to drive the first movable part to move relative to the housing. The temperature adjusting module is disposed in the housing for adjusting the temperature of the optical system.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A radio frequency (RF) communication assembly includes an RF communication circuit and a compensator apparatus. The compensator apparatus receives an input including an I-component of a pre-compensated signal, a Q-component of the pre-compensated signal, and encoded operating conditions of the RF communication circuit. The RF communication circuit includes RF circuit components causing signal impairments. The compensator apparatus perform neural network computing on the input, and the RF communication assembly generates a compensated output signal that compensates for at least a portion of the signal impairments.

Abstract: A voltage converter is connected with a load. The voltage converter includes a power source, a first switching element, a second switching element, an energy storage inductor, an energy storage capacitor and N capacitor modules. The first switching element is connected between a first terminal of the power source and a first node. The second switching element is connected between the first node and a second node. A second terminal of the power source is connected with the second node. The energy storage inductor is connected between the first node and the third node. The N capacitor modules are connected between the third node and a fourth node, wherein N is a positive integer. The energy storage capacitor is connected between the fourth node and the second node.

Abstract: A radio frequency (RF) communication assembly includes an RF communication circuit and a compensator apparatus. The compensator apparatus receives an input including an I-component of a pre-compensated signal, a Q-component of the pre-compensated signal, and encoded operating conditions of the RF communication circuit. The RF communication circuit includes RF circuit components causing signal impairments. The compensator apparatus perform neural network computing on the input, and the RF communication assembly generates a compensated output signal that compensates for at least a portion of the signal impairments.

Abstract: According to at least one aspect, a communication system is provided. The communication system includes a first switch device configured to receive a first plurality of radio frequency (RF) signals detected by an antenna array and provide an RF signal selected from among the first plurality of RF signals to a receiver circuit, the first plurality of RF signals comprising a first RF signal in a first frequency range and a second RF signal in a second frequency range that is different from the first frequency range; and a second switch device configured to receive a second plurality of RF signals detected by the antenna array and provide an RF signal selected from among the second plurality of RF signals to the receiver circuit, the second plurality of RF signals comprising a third RF signal in the first frequency range and a fourth RF signal in the second frequency range.

Abstract: According to at least one aspect, a communication system is provided. The communication system includes a first switch device configured to receive a first plurality of radio frequency (RF) signals detected by an antenna array and provide an RF signal selected from among the first plurality of RF signals to a receiver circuit, the first plurality of RF signals comprising a first RF signal in a first frequency range and a second RF signal in a second frequency range that is different from the first frequency range; and a second switch device configured to receive a second plurality of RF signals detected by the antenna array and provide an RF signal selected from among the second plurality of RF signals to the receiver circuit, the second plurality of RF signals comprising a third RF signal in the first frequency range and a fourth RF signal in the second frequency range.

Abstract: A filtering system includes a first filtering module, which includes a first frequency translating device and a first filter. The first frequency translating device includes a center frequency control end that receives a first control signal and an input end that receives an input signal, and performs a first frequency translation on the input signal by utilizing a first control frequency of the first control signal as a center frequency. The first filter performs a first filter on the input signal according to equivalent impedance of a circuit coupled to the input end, and generates in collaboration with the first frequency translating device a first filtered input signal at an output end of the filtering system. The equivalent impedance determines a bandwidth of the first filtered input signal.

Abstract: A filtering system includes a first filtering module, which includes a first frequency translating device and a first filter. The first frequency translating device includes a center frequency control end that receives a first control signal and an input end that receives an input signal, and performs a first frequency translation on the input signal by utilizing a first control frequency of the first control signal as a center frequency. The first filter performs a first filter on the input signal according to equivalent impedance of a circuit coupled to the input end, and generates in collaboration with the first frequency translating device a first filtered input signal at an output end of the filtering system. The equivalent impedance determines a bandwidth of the first filtered input signal.