Patents by Inventor Chaojun Deng

Chaojun Deng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240107656
    Abstract: A circuit board assembly is applied to the field of electronic communications technologies to resolve a prior-art heat dissipation problem of a circuit board. The circuit board assembly combines, on a second circuit board, low-speed signals transmitted between a plurality of I/O modules and an IC chip, and then transmits the combined low-speed signals to the IC chip by using a low-speed cable. A low-speed signal sent by the IC chip to the plurality of I/O modules is extended to a plurality of low-speed signals on the second circuit board, and then the plurality of low-speed signals are separately sent to the plurality of I/O modules. This may be applied to a scenario in which a relatively large quantity of electronic components need to be disposed on a circuit board.
    Type: Application
    Filed: September 26, 2023
    Publication date: March 28, 2024
    Inventors: Chaojun DENG, Fei MA, Wei FANG, Zhiwen YANG, Chungang LI, Shun HAO
  • Publication number: 20240085757
    Abstract: An optical phased board includes a plurality of optical waveguide layers and a plurality of isolation layers. Each optical waveguide layer includes a plurality of optical waveguides, and the optical waveguides are arranged side by side. The optical waveguide layers and the isolation layers are arranged in a superimposed manner, and each isolation layer is located between two adjacent optical waveguide layers. The optical phased board includes a two-dimensional optical waveguide array to perform two-dimensional beam scanning.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 14, 2024
    Inventors: Chaojun Deng, Xiaoyun Wei, Yong Yang, Dajun Zang
  • Patent number: 11862529
    Abstract: Embodiments of this application provide a chip and a manufacturing method thereof, and an electronic device, and belong to the field of chip heat dissipation technologies. The chip includes a die and a thermal conductive sheet. An active surface of the die is connected to the thermal conductive sheet by using a first bonding layer. Heat generated at a part with a relatively high temperature on the active surface of the die can be quickly conducted and dispersed by using the thermal conductive sheet, so that temperatures on the active surface are evenly distributed to avoid an excessively high local temperature of the chip, thereby preventing running of the chip from being affected.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: January 2, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Chaojun Deng, Xiaoyun Wei, Yong Yang, Jiye Xu, Xing Fu
  • Patent number: 11805592
    Abstract: A circuit board assembly is applied to the field of electronic communications technologies to resolve a prior-art heat dissipation problem of a circuit board. The circuit board assembly combines, on a second circuit board, low-speed signals transmitted between a plurality of I/O modules and an IC chip, and then transmits the combined low-speed signals to the IC chip by using a low-speed cable. A low-speed signal sent by the IC chip to the plurality of I/O modules is extended to a plurality of low-speed signals on the second circuit board, and then the plurality of low-speed signals are separately sent to the plurality of I/O modules. This may be applied to a scenario in which a relatively large quantity of electronic components need to be disposed on a circuit board.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: October 31, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Chaojun Deng, Fei Ma, Wei Fang, Zhiwen Yang, Chungang Li, Shun Hao
  • Patent number: 11776820
    Abstract: Embodiments of the application provide a vertical interconnection structure and a manufacturing method thereof, a packaged chip, and a chip packaging method. Conductive pillars are formed on a first surface of a substrate. A first insulated support layer wrapping the conductive pillars is formed on the first surface of the substrate. The conductive pillars are located in the first insulated support layer. An upper surface of the conductive pillar that is away from the substrate is not covered by the first insulated support layer. Then the substrate is removed.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: October 3, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xiaoyun Wei, Yong Yang, Chaojun Deng
  • Publication number: 20230258890
    Abstract: An optical cage assembly includes a box-like housing, a radiator, and a cover-like fastener. The box-like housing has a slot. A first housing wall of the box-like housing has an opening at a position close to a slot opening of the slot. The radiator is located at the opening and can be bonded to an electrical connector plugged into the slot. The cover-like fastener is fastened to housing walls of the box-like housing, and the cover-like fastener has a memory alloy member, where the memory alloy member is located on a surface that is of the radiator and that is away from the opening. In this disclosure, easy plugging and unplugging of an optical module in the slot can be implemented, heat transfer between the radiator and the optical module can be accelerated, and an effect of heat dissipation for the optical module can be enhanced.
    Type: Application
    Filed: April 18, 2023
    Publication date: August 17, 2023
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xiaorui Liu, Chaojun Deng, Chunrong Li, Xiaoyu Tang
  • Publication number: 20220344237
    Abstract: A heat dissipation structure includes a peripheral substrate, a chip substrate, a thermally conductive material, and a heat sink. One end of the peripheral substrate is connected to the chip substrate along a periphery of the chip substrate, and the heat sink is connected to the other end of the peripheral substrate. Additionally, an accommodation space is defined among the peripheral substrate, the heat sink, and the chip substrate. The thermally conductive material is filled in the accommodation space, and the chip substrate is configured to place a silicon die. When power consumption of the chip increases, the heat generated by the chip may be dissipated by using the silicon die and the thermally conductive material, so that heat dissipation efficiency is improved, and a heat dissipation effect is improved.
    Type: Application
    Filed: July 12, 2022
    Publication date: October 27, 2022
    Inventor: Chaojun DENG
  • Publication number: 20220344238
    Abstract: A chip includes a housing, a plurality of silicon wafers, and a plurality of thermal pads. The plurality of silicon wafers and the plurality of thermal pads are mounted in the housing in a stacked manner. The thermal pad is mounted between two adjacent silicon wafers, and an edge of the thermal pad extends from a gap between the two adjacent silicon wafers. The thermal pad is mounted between the two adjacent silicon wafers.
    Type: Application
    Filed: July 12, 2022
    Publication date: October 27, 2022
    Inventor: Chaojun Deng
  • Publication number: 20220216171
    Abstract: A chip package structure includes a glass substrate, a routing layer, and a plurality of dies. A first surface of the glass substrate has solder joints and a second surface of the glass substrate has substrate solder balls. The routing layer is located in the glass substrate, and the solder joints are electrically connected to the substrate solder balls by using the routing layer. Each die has chip solder balls, is located on the first surface of the glass substrate, and the solder joints are bonded to the chip solder balls. The embodiments can improve connection reliability between the die and the glass substrate and can reduce a signal transmission loss.
    Type: Application
    Filed: December 23, 2021
    Publication date: July 7, 2022
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Chaojun DENG, Xiaoyun WEI, Yong YANG
  • Patent number: 11309967
    Abstract: This application discloses a communications network and a related device. In one embodiment, the communications network includes a first optical line terminal and a second optical line terminal. The first optical line terminal is configured to send, through a first passive optical network (PON) interface based on a first PON protocol, a first optical signal to the at least one second optical line terminal. The second optical line terminal is configured to process the first optical signal and send through a second PON interface based on a second PON protocol, a processed first optical signal to at least one customer-premises equipment during downstream data transmissions, and process a second optical signal and send, through the first PON interface based on the first PON protocol, the processed second optical signal to the first optical line terminal during upstream data transmissions.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: April 19, 2022
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Chaojun Deng, Liankui Lin
  • Publication number: 20220102237
    Abstract: Embodiments of this application provide a chip and a manufacturing method thereof, and an electronic device, and belong to the field of chip heat dissipation technologies. The chip includes a die and a thermal conductive sheet. An active surface of the die is connected to the thermal conductive sheet by using a first bonding layer. Heat generated at a part with a relatively high temperature on the active surface of the die can be quickly conducted and dispersed by using the thermal conductive sheet, so that temperatures on the active surface are evenly distributed to avoid an excessively high local temperature of the chip, thereby preventing running of the chip from being affected.
    Type: Application
    Filed: September 13, 2021
    Publication date: March 31, 2022
    Inventors: Chaojun DENG, Xiaoyun WEI, Yong YANG, Jiye XU, Xing FU
  • Publication number: 20220102164
    Abstract: Embodiments of the application provide a vertical interconnection structure and a manufacturing method thereof, a packaged chip, and a chip packaging method. Conductive pillars are formed on a first surface of a substrate. A first insulated support layer wrapping the conductive pillars is formed on the first surface of the substrate. The conductive pillars are located in the first insulated support layer. An upper surface of the conductive pillar that is away from the substrate is not covered by the first insulated support layer. Then the substrate is removed.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 31, 2022
    Inventors: Xiaoyun WEI, Yong YANG, Chaojun DENG
  • Publication number: 20210212193
    Abstract: A circuit board assembly is applied to the field of electronic communications technologies to resolve a prior-art heat dissipation problem of a circuit board. The circuit board assembly combines, on a second circuit board, low-speed signals transmitted between a plurality of I/O modules and an IC chip, and then transmits the combined low-speed signals to the IC chip by using a low-speed cable. A low-speed signal sent by the IC chip to the plurality of I/O modules is extended to a plurality of low-speed signals on the second circuit board, and then the plurality of low-speed signals are separately sent to the plurality of I/O modules. This may be applied to a scenario in which a relatively large quantity of electronic components need to be disposed on a circuit board.
    Type: Application
    Filed: January 22, 2021
    Publication date: July 8, 2021
    Inventors: Chaojun DENG, Fei MA, Wei FANG, Zhiwen YANG, Chungang LI, Shun HAO
  • Patent number: 10945068
    Abstract: An ultrasonic wave-based voice signal transmission system, where the system includes an ultrasonic modulator, a beamforming controller, an ultrasonic transducer array, and a user detector. The ultrasonic modulator is configured to modulate a voice signal onto an ultrasonic band and output the modulated voice signal to the beamforming controller. The user detector is configured to detect a user and output a detection result of the user to the beamforming controller. The beamforming controller is configured to control according to the detection result from the user detector, a phase and amplitude of the modulated voice signal to obtain an electrical signal pointing to the user, and output, to the ultrasonic transducer array, the electrical signal pointing to the user. Therefore, call convenience can be improved for the user.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: March 9, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Chaojun Deng, Liming Fang
  • Publication number: 20200343975
    Abstract: This application discloses a communications network and a related device. In one embodiment, the communications network includes a first optical line terminal and a second optical line terminal. The first optical line terminal is configured to send, through a first passive optical network (PON) interface based on a first PON protocol, a first optical signal to the at least one second optical line terminal. The second optical line terminal is configured to process the first optical signal and send through a second PON interface based on a second PON protocol, a processed first optical signal to at least one customer-premises equipment during downstream data transmissions, and process a second optical signal and send, through the first PON interface based on the first PON protocol, the processed second optical signal to the first optical line terminal during upstream data transmissions.
    Type: Application
    Filed: July 8, 2020
    Publication date: October 29, 2020
    Inventors: Chaojun DENG, Liankui LIN
  • Publication number: 20190297416
    Abstract: An ultrasonic wave-based voice signal transmission system, where the system includes an ultrasonic modulator, a beamforming controller, an ultrasonic transducer array, and a user detector. The ultrasonic modulator is configured to modulate a voice signal onto an ultrasonic band and output the modulated voice signal to the beamforming controller. The user detector is configured to detect a user and output a detection result of the user to the beamforming controller. The beamforming controller is configured to control according to the detection result from the user detector, a phase and amplitude of the modulated voice signal to obtain an electrical signal pointing to the user, and output, to the ultrasonic transducer array, the electrical signal pointing to the user. Therefore, call convenience can be improved for the user.
    Type: Application
    Filed: June 3, 2016
    Publication date: September 26, 2019
    Inventors: Chaojun Deng, Liming Fang
  • Patent number: 7936776
    Abstract: This invention discloses a method for smooth capacity expansion of data communication product, and a smooth capacity expandable system of data communication. Architecture of the system at least comprises circuit card and switched network card; and further comprises interface card of switched network, interface transfer card and connection optical fiber. Based on these, it provides one kind of multiple frameworks structure with interconnection between frameworks. When the capacity is expanded, the original circuit cards and switched network cards keep unchanged, only smoothly increases the switched network cards and numbers of circuit card frameworks. Therefore, it implements smooth capacity expansion and client investment protection at the same time. With adding backup cards, it also implements capacity expansion without interrupting the service.
    Type: Grant
    Filed: December 8, 2006
    Date of Patent: May 3, 2011
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Chaojun Deng
  • Patent number: 7826495
    Abstract: The present invention discloses a method and Ethernet device for clock synchronization, a method for clock synchronization in an entire Ethernet, and the relevant Ethernet. The method for clock synchronization in an Ethernet device includes: the PHY layer unit of the Ethernet device extracts a clock from the data sent by the receive unit; the MAC layer unit makes adjustments to the extracted clock according to the local clock and takes the adjusted clock as the transmit clock of the Ethernet device. The method for clock synchronization in an entire Ethernet includes: clocks of all Ethernet devices are synchronized to the clock generated by the Ethernet device at the highest level. The invention provides a method for clock synchronization so that sending and receiving of clocks in Ethernet devices can be synchronized and clock synchronization can be realized in the entire Ethernet.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: November 2, 2010
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Chaojun Deng, Jinhua Ye
  • Patent number: 7724646
    Abstract: A system for implementing service switching includes a primary service processing unit, a physical interface card, a control center, a switching unit and a standby service processing unit, to guarantee that the physical interface card connected to the failed primary service processing unit transmits the service data that should be processed by the primary service processing unit to the standby service processing unit, and to control the control switching unit to transmit the service data that should be transmitted to the primary service processing unit to the standby service processing unit. A method for implementing service switching includes: managing the physical interface card to transmit the service data that should be processed by the primary service processing unit to the standby service processing unit, and managing the switching unit to transmit the service data that should be transmitted to the primary service processing unit to the standby service processing unit.
    Type: Grant
    Filed: November 29, 2006
    Date of Patent: May 25, 2010
    Assignee: Huawei Technologies, Co., Ltd.
    Inventors: Chaojun Deng, Ziqiang Wang, Jinhua Ye
  • Patent number: 7602804
    Abstract: This invention discloses a method for smooth capacity expansion of data communication product, and a smooth capacity expandable system of data communication. Architecture of the system at least comprises circuit card and switched network card; and further comprises interface card of switched network, interface transfer card and connection optical fiber. Based on these, it provides one kind of multiple frameworks structure with interconnection between frameworks. When the capacity is expanded, the original circuit cards and switched network cards keep unchanged, only smoothly increases the switched network cards and numbers of circuit card frameworks. Therefore, it implements smooth capacity expansion and client investment protection at the same time. With adding backup cards, it also implements capacity expansion without interrupting the service.
    Type: Grant
    Filed: April 5, 2001
    Date of Patent: October 13, 2009
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Chaojun Deng