Patents by Inventor Chaolu WANG

Chaolu WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260164794
    Abstract: A display substrate, a manufacturing method therefor, and a display device are disclosed. The display substrate includes: a base substrate and a plurality of sub-pixels arranged in an array on the base substrate. Each of the sub-pixels includes a light-emitting device and a pixel driving circuit for driving the light-emitting device; the pixel driving circuit includes at least two oxide transistors and a storage capacitor; the storage capacitor includes a first electrode and a second electrode sequentially facing away from the base substrate and arranged opposite to each other; in the at least two oxide transistors, a distance between a gate of one oxide transistor and an active layer of the one oxide transistor is different from a distance between a gate of at least one of other oxide transistors and an active layer of the at least one of other oxide transistors.
    Type: Application
    Filed: April 21, 2023
    Publication date: June 11, 2026
    Inventors: Meng ZHAO, Chaolu WANG, Jinqian WANG
  • Publication number: 20260164933
    Abstract: A display substrate and preparation method therefor, and display apparatus. The display substrate includes multiple circuit units, a circuit unit includes a pixel drive circuit, a first scan signal line, a second scan signal line, a third scan signal line and a light emitting signal line. The pixel drive circuit at least includes an eighth transistor and a ninth transistor. An orthographic projection of first scan signal line on a plane of the display substrate at least partially overlaps that of second scan signal line on the plane of the display substrate, an orthographic projection of third scan signal line on the plane of the display substrate at least partially overlaps that of light emitting signal line on plane of the display substrate, an orthographic projection of eighth transistor on the plane of the display substrate at least partially overlaps that of ninth transistor on plane of the display substrate.
    Type: Application
    Filed: August 31, 2023
    Publication date: June 11, 2026
    Inventors: Jiao ZHAO, Meng ZHAO, Yuzhen GUO, Chenyang ZHANG, Xiaorong CUI, Lipeng GAO, Haoliang ZHENG, Minghua XUAN, Ying ZHOU, Feng GUAN, Jianhua DU, Yang LV, Chaolu WANG, Yicheng WANG, Rui YAN, Hao WU, Li XIAO
  • Patent number: 12648285
    Abstract: A driving backplane includes a first substrate, a thick copper layer, a second substrate, and a driving layer stacked in sequence. The thick copper layer is provided with a driving wire configured to load a driving signal. The driving layer is provided with a driving circuit. The driving circuit is electrically connected to the driving wire through a via.
    Type: Grant
    Filed: March 31, 2023
    Date of Patent: June 2, 2026
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xue Dong, Feng Guan, Guangcai Yuan, Ce Ning, Minghua Xuan, Haoliang Zheng, Fei Wang, Jianhua Du, Yang Lv, Chaolu Wang
  • Patent number: 12635248
    Abstract: The disclosure relates to an array substrate, a display panel, and a method for manufacturing an array substrate. The array substrate includes a first active layer on a substrate; a second active layer on a side of the first active layer away from the substrate; an intermediate layer between the first and second active layers and including a first via arriving at the first active layer, wherein the second active layer includes first, second and third sub-active layers, the first sub-active layer extending around a perimeter of the first via and in a direction away from the first via, the second sub-active layer covering a side wall of the first via, the third sub-active layer being at a bottom of the first via and covering a portion of a surface of the second active layer exposed by the first via, and wherein the second active layer is continuous.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: May 19, 2026
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chaolu Wang, Liuqing Li, Feng Guan, Meng Zhao, Jinchao Zhang
  • Patent number: 12550524
    Abstract: A display substrate and a preparation method thereof, a preparation apparatus and a display apparatus are provided, which relate to the technical field of display. The display substrate includes a plurality of light-emitting areas and non-light-emitting areas surrounding respective light-emitting areas. The display substrate includes: a base substrate; a light-emitting functional layer disposed at a side of the base substrate, the light-emitting functional layer including a light-emitting material located in the plurality of light-emitting areas and the non-light-emitting areas. The light-emitting material in the non-light-emitting areas is doped with destructive ions, and the destructive ions are configured for destroying luminescent characteristics of the light-emitting material in the non-light-emitting area.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: February 10, 2026
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Feng Guan, Yongfeng Zhang, Chaolu Wang, Meng Zhao
  • Publication number: 20250280640
    Abstract: A driving backplane includes a first substrate, a thick copper layer, a second substrate, and a driving layer stacked in sequence. The thick copper layer is provided with a driving wire configured to load a driving signal. The driving layer is provided with a driving circuit. The driving circuit is electrically connected to the driving wire through a via.
    Type: Application
    Filed: March 31, 2023
    Publication date: September 4, 2025
    Inventors: Xue DONG, Feng GUAN, Guangcai YUAN, Ce NING, Minghua XUAN, Haoliang ZHENG, Fei WANG, Jianhua DU, Yang LV, Chaolu WANG
  • Publication number: 20250107410
    Abstract: Provided is a display module, including a base substrate, a plurality of light-emitting patterns, and a plurality of microlens groups corresponding to the light-emitting patterns. An orthographic projection region of at least one of the light-emitting patterns on the base substrate forms a primary display region. The plurality of microlens groups are disposed on a side, distal from the base substrate, of the plurality of light-emitting patterns. An orthographic projection of the microlens group on the base substrate is within the primary display region formed by the corresponding light-emitting pattern. The microlens group includes at least two microlens structures, and a gap is defined between any adjacent two microlens structures. The light-emitting pattern includes a target region. An orthographic projection of the target region on the base substrate is overlapped with an orthographic projection of the gap on the base substrate. The target region does not emit light.
    Type: Application
    Filed: December 5, 2022
    Publication date: March 27, 2025
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Wenqing XUE, Renquan GU, Wusheng LI, Qi YAO, Huili WU, Shipei LI, Wei HE, Jianjun ZHAO, Yongfeng ZHANG, Chaolu WANG
  • Publication number: 20250017046
    Abstract: A display substrate is provided. The display substrate includes a plurality of functional material layers extending at least partially across multiple subpixels. The plurality of functional material layers include a first portion in an inter-subpixel region, and a second portion in subpixel regions. The first portion includes a doped impurity. The first portion and the second portion include at least one functional material in common. A weight percentage of the doped impurity in the first portion is higher than a weight percentage of the doped impurity in the second portion. The first portion spaces apart adjacent subpixels. The second portion includes a light emitting layer of a respective subpixel.
    Type: Application
    Filed: November 29, 2022
    Publication date: January 9, 2025
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Chaolu Wang, Yongfeng Zhang, Renquan Gu, Feng Guan, Meng Zhao, Yang Lv, Jianhua Du, Hao Wu, Rui Yan, Wenqing Xue
  • Publication number: 20240423007
    Abstract: A display substrate and a preparation method thereof, a preparation apparatus and a display apparatus are provided, which relate to the technical field of display. The display substrate includes a plurality of light-emitting areas and non-light-emitting areas surrounding respective light-emitting areas. The display substrate includes: a base substrate; a light-emitting functional layer disposed at a side of the base substrate, the light-emitting functional layer including a light-emitting material located in the plurality of light-emitting areas and the non-light-emitting areas. The light-emitting material in the non-light-emitting areas is doped with destructive ions, and the destructive ions are configured for destroying luminescent characteristics of the light-emitting material in the non-light-emitting area.
    Type: Application
    Filed: July 11, 2022
    Publication date: December 19, 2024
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Feng Guan, Yongfeng Zhang, Chaolu Wang, Meng Zhao
  • Publication number: 20240395831
    Abstract: The disclosure relates to an array substrate, a display panel, and a method for manufacturing an array substrate. The array substrate includes a first active layer on a substrate; a second active layer on a side of the first active layer away from the substrate; an intermediate layer between the first and second active layers and including a first via arriving at the first active layer, wherein the second active layer includes first, second and third sub-active layers, the first sub-active layer extending around a perimeter of the first via and in a direction away from the first via, the second sub-active layer covering a side wall of the first via, the third sub-active layer being at a bottom of the first via and covering a portion of a surface of the second active layer exposed by the first via, and wherein the second active layer is continuous.
    Type: Application
    Filed: September 27, 2022
    Publication date: November 28, 2024
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chaolu WANG, Liuqing LI, Feng GUAN, Meng ZHAO, Jinchao ZHANG
  • Publication number: 20240379885
    Abstract: The present disclosure provides a ray detector, a method for manufacturing a ray detector, and an electronic device. The method includes: forming a buffer layer on a first surface of a substrate, wherein the first surface of the substrate includes a first region and a second region; forming a shared layer on a surface of the buffer layer distal to the substrate; processing a portion of the shared layer in the first region to obtain an active layer of a thin film transistor; and processing a portion of the shared layer in the second region to obtain an absorption layer of a photodiode.
    Type: Application
    Filed: May 30, 2022
    Publication date: November 14, 2024
    Inventors: Hao WU, Feng GUAN, Jianhua DU, Yang LV, Rui YAN, Meng ZHAO, Chaolu WANG
  • Publication number: 20240373674
    Abstract: Provided are a display substrate and a display device. The display substrate includes a base substrate and pixel units each including a pixel driving circuit at least including a first and a second thin film transistors; a first semiconductor layer, a first conductive layer, a second conductive layer and a second semiconductor layer are sequentially arranged on the base substrate; the first semiconductor layer includes a first active layer, including a first source region, of the first thin film transistor; the first conductive layer includes a first gate of the first thin film transistor; the second conductive layer includes a first transfer electrode electrically connected to the first source region; the second semiconductor layer includes a second active layer, which includes a second source region, of the second thin film transistor; the second source region is electrically connected to the first transfer electrode.
    Type: Application
    Filed: June 29, 2022
    Publication date: November 7, 2024
    Inventors: Wei LIU, Meng ZHAO, Cheng XU, Dandan ZHOU, Renquan GU, Jianhua DU, Chaolu WANG
  • Publication number: 20240347541
    Abstract: A driving backplane, a display device and preparation methods therefor are provided. The method includes: providing a base substrate with first, second surfaces and a side surface connected therebetween; forming a flexible film layer on the first surface, and patterning the flexible film layer to form a first opening portion including first, second and third parts sequentially connected; bending partial flexible film layer to the second surface, such that first, second and third parts are opposite to the first, side and second surfaces; forming a conductive layer on a side of the flexible film layer away from the base substrate by using the flexible film layer as a mask, the conductive layer being formed in at least a part of the first opening portion to form a conductive strip; and at least removing the flexible film layer and the conductive layer around the conductive strip.
    Type: Application
    Filed: June 21, 2024
    Publication date: October 17, 2024
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Jianhua DU, Jinxiang XUE, Xinhong LU, Yingwei LIU, Meng ZHAO, Hao WU, Feng GUAN, Yang LV, Chaolu WANG
  • Publication number: 20240347550
    Abstract: A method for preparing a driving backplane includes: providing a base substrate, forming a connecting layer on a side of the base substrate; forming an insulating layer group on a side of the connecting layer away from the base substrate, forming a first via hole by patterning the insulating layer group; forming inducing particles on a side of the insulating layer group away from the base substrate; forming a doped amorphous silicon layer on a side of the inducing particles away from the base substrate, forming a first conductor part by the doped amorphous silicon layer formed in the first via hole, forming a raw material part by patterning the doped amorphous silicon layer; and forming a first channel part by causing the inducing particles to induce the raw material part, wherein the first channel part is connected to the first conductor part.
    Type: Application
    Filed: June 27, 2024
    Publication date: October 17, 2024
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Yang LV, Feng GUAN, Jianhua DU, Meng ZHAO, Hao WU, Chaolu WANG