Abstract: Provided are a circuit and method for measuring capacitance and capacitance-voltage characteristics of a microelectronic device. The circuit includes a pulse generation sub-circuit, a sub-circuit P, and a sub-circuit N. The pulse generation sub-circuit generates clock pulses CLK1 and CLK2 with non-overlapping active levels. The sub-circuit P includes a first current mirror, a first large capacitor, a first transmission gate, a second transmission gate, a first OR gate, a first AND gate, a first NOT gate, a second NOT gate, and a third NOT gate. The sub-circuit N includes a second current mirror, a second large capacitor, a third transmission gate, a fourth transmission gate, a second OR gate, a second AND gate, a fourth NOT gate, a fifth NOT gate, a sixth NOT gate, and a seventh NOT gate.