Abstract: The invention relates to a plant that includes a transgene encoding a heterologous polypeptide conferring on plant expressing said polypeptide resistance to a hemipteroid sap-sucking insect. The transgene is also expressed in a plant component (such as a leaf). Typically, expression of such polypeptides deters feeding by insects such as psyllids (such as an Asian citrus psyllid, the African citrus psyllid, or the American citrus psyllid). Exemplary plants useful in the invention are citrus or solanaceous plants.

Abstract: The invention relates to a plant that includes a transgene encoding a heterologous polypeptide conferring on plant expressing said polypeptide resistance to a hemipteroid sap-sucking insect. The transgene is also expressed in a plant component (such as a leaf). Typically, expression of such polypeptides deters feeding by insects such as psyllids (such as an Asian citrus psyllid, the African citrus psyllid, or the American citrus psyllid). Exemplary plants useful in the invention are citrus or solanaceous plants.

Abstract: The invention relates to a plant that includes a transgene encoding a heterologous polypeptide conferring on plant expressing said polypeptide resistance to a hemipteroid sap-sucking insect. The transgene is also expressed in a plant component (such as a leaf). Typically, expression of such polypeptides deters feeding by insects such as psyllids (such as an Asian citrus psyllid, the African citrus psyllid, or the American citrus psyllid). Exemplary plants useful in the invention are citrus or solanaceous plants.

Abstract: The invention relates to a plant that includes a transgene encoding a heterologous polypeptide conferring on plant expressing said polypeptide resistance to a hemipteroid sap-sucking insect. The transgene is also expressed in a plant component (such as a leaf). Typically, expression of such polypeptides deters feeding by insects such as psyllids (such as an Asian citrus psyllid, the African citrus psyllid, or the American citrus psyllid). Exemplary plants useful in the invention are citrus or solanaceous plants.

Abstract: Systems (100) and methods (300) for synchronizing operations of processors (102, 104). The methods involve: receiving by an electronic circuit (106) a first request (250) from a first processor for writing first data (262) to or reading first data from a first address (260) in a first data store (122), and subsequently a second request (252) from a second processor for writing second data (266) to or reading second data from a second address (264) in a second data store (124); comparing values of the first and second addresses to each other and values of the first and second data to each other; and concurrently communicating an asynchronous ready signal (254) from the electronic circuit to the processors when the values of the addresses and data respectively match each other. The asynchronous ready signal causes operations of the processors to be synchronized in time with each other.

Abstract: Systems (100) and methods (300) for synchronizing operations of processors (102, 104). The methods involve: receiving by an electronic circuit (106) a first request (250) from a first processor for writing first data (262) to or reading first data from a first address (260) in a first data store (122), and subsequently a second request (252) from a second processor for writing second data (266) to or reading second data from a second address (264) in a second data store (124); comparing values of the first and second addresses to each other and values of the first and second data to each other; and concurrently communicating an asynchronous ready signal (254) from the electronic circuit to the processors when the values of the addresses and data respectively match each other. The asynchronous ready signal causes operations of the processors to be synchronized in time with each other.

Abstract: A multilateral access system for a multilateral well including a main well bore and at least one lateral well bore includes a tubular workstring having an inner string and an outer string. The outer string includes a diverter body having a cylindrical housing with a lateral window, the diverter body being shaped and dimensioned to direct the inner string the lateral window and into the at least one lateral well bore. The system is used by positioning the tubular workstring within a multilateral bore. The method further includes positioning the diverter body such that the window of the diverter body faces a milled casing window of the lateral well bore and moving the inner string upwardly above the diverter body. Subsequently, the inner string is lowered back though the diverter body, wherein the diverter body exerts a lateral force on a lower end of the inner string urging the lower end of the inner string toward the milled casing window.

Abstract: A multilateral access system for a multilateral well including a main well bore and at least one lateral well bore includes a tubular workstring having an inner string and an outer string. The outer string includes a diverter body having a cylindrical housing with a lateral window, the diverter body being shaped and dimensioned to direct the inner string the lateral window and into the at least one lateral well bore. The system is used by positioning the tubular workstring within a multilateral bore. The method further includes positioning the diverter body such that the window of the diverter body faces a milled casing window of the lateral well bore and moving the inner string upwardly above the diverter body. Subsequently, the inner string is lowered back though the diverter body, wherein the diverter body exerts a lateral force on a lower end of the inner string urging the lower end of the inner string toward the milled casing window.

Abstract: A method for booting a software operating environment and software applications within a wireless communications system (100) is provided. The method (500) includes executing one or more boot manager programs (516). The method further includes executing a first stage program code (614) and a second stage program code (618) in response to a boot manager program. The method includes loading an operating system (714) and launching a low level radio function application (716) in response to a boot manager program. The low level radio function can be an emergency communications application. Subsequent to loading the operating system and launching the low level radio function application, the method further includes loading a middleware (812) and a core framework (814) in response to the second stage program code. The method includes loading a device driver software programs in response to the first stage program code. The device driver software programs can be allocated and deallocated upon stated events.

Abstract: Apparatus (100) for communicating clock correction data between two or more clocked entities (102, 104) using a standardized clock correction unit or quanta. A source-native pre-scaler (302) can convert source-native clock correction values to scaled source-native clock correction values. The pre-scaler can perform this conversion by multiplying each source-native clock correction value by a factor N1. A source-native divider (308) can divide an adjusted source-native clock correction value by a value M1 to produce a standard quotient and a standard remainder. The standard quotient defines a standard clock correction value. Further, a source-native accumulator 306 can accumulate a sum comprised of the scaled source-native clock corrections and the standard remainder produced from the source-native divider. The sum can define the adjusted source-native clock correction value.

Abstract: A method for booting a software operating environment and software applications within a wireless communications system (100) is provided. The method (500) includes executing one or more boot manager programs (516). The method further includes executing a first stage program code (614) and a second stage program code (618) in response to a boot manager program. The method includes loading an operating system (714) and launching a low level radio function application (716) in response to a boot manager program. The low level radio function can be an emergency communications application. Subsequent to loading the operating system and launching the low level radio function application, the method further includes loading a middleware (812) and a core framework (814) in response to the second stage program code. The method includes loading a device driver software programs in response to the first stage program code. The device driver software programs can be allocated and deallocated upon stated events.

Abstract: Apparatus (100) for communicating clock correction data between two or more clocked entities (102, 104) using a standardized clock correction unit or quanta. A source-native pre-scaler (302) can convert source-native clock correction values to scaled source-native clock correction values. The pre-scaler can perform this conversion by multiplying each source-native clock correction value by a factor N1. A source-native divider (308) can divide an adjusted source-native clock correction value by a value M1 to produce a standard quotient and a standard remainder. The standard quotient defines a standard clock correction value. Further, a source-native accumulator 306 can accumulate a sum comprised of the scaled source-native clock corrections and the standard remainder produced from the source-native divider. The sum can define the adjusted source-native clock correction value.

Abstract: A technique for decreasing the amount of time needed to turn on a software-defined radio provides an operator of the radio the ability to turn the radio off and subsequently turn the radio on, wherein the radio is turned on much more quickly than a radio not using the herein described technique. The technique places the radio in a suspended state when off and retains selected parameters associated with selected applications and software portions. Preferably, the radio is placed in a low power consumption state concurrently with the suspended state. Thus the radio conserves power, thus increasing battery life. When the operator turns the radio on, the radio is restored to a fully function state utilizing the retained parameters.

Abstract: A magnetic domain memory including bubble operated access elements for non-destructively reading the memory, for erasing bubbles from the memory and for writing new data into the memory. The access elements comprise retrograde transient bubble switches, exclusive merge elements, disjoint crossover elements and bubble generators, all of which are all-bubble logic elements.

Abstract: A magnetic bubble memory organization comprising a plurality of magnetic bubble memory chips arranged in rows and columns to form a matrix. Each chip has a plurality of memory locations for storing magnetic bubbles, selectively operable components for transferring magnetic bubbles out of and into memory locations for the retrieval and storage of information, a selectively operable replicator and annihilator of magnetic bubble information transferred out of memory locations on the chip, a generator selectively operable for producing magnetic bubbles for storage in memory locations on the chip, and a detector for sensing the presence of magnetic bubbles transferred out of memory locations and for providing an electrical output signal in response to the detection thereof. First transfer electrical control signals are respectively commonly applied to the first transfer components on all chips in each of the respective columns of the matrix for their simultaneous actuation.

Abstract: A magnetic bubble processor comprising components for causing the movement of magnetic bubbles and a single chip having a layer of magnetic material in which magnetic bubbles can be moved. The chip comprises an input circuit for conveying electrical data and instructions into the processor and a generator responsive to the input data and instructions for producing magnetic bubbles representing bits of information. Paths are provided on the chip for routing magnetic bubbles within the processor as well as a memory organization accessible for the storage and retrieval of magnetic bubble information. The chip also includes magnetic bubble logic for performing mathematical operations and for providing magnetic bubble output information representing the results thereof.