Abstract: The invention relates to computer-implemented systems and methods for implementing a verified digital asset platform. An embodiment of the present invention is directed to enabling companies to provide professional recognition awards to employees utilizing digital assets, such as NFT (Non-Fungible Tokens). With an embodiment of the present invention, a digital wallet may store public and private keys and allow the owner to perform various actions including access assets, manage assets and sign transactions.

Abstract: Methods and apparatus for a detector system having a photodetector and an amplifier to amplify the photodetector signal. A discriminator generates an active output signal when the output from the amplifier is greater than a threshold. An injection circuit is coupled to the input of the amplifier. The injection circuit is configured to selectively inject a test pulse that mimics a pulse from the photodetector for verifying operation of the detector system.

Abstract: Systems, methods, and circuits utilize one or multiple data-stream watchdog codes for verifying a temporal state of data from a sensor system. A data-stream watchdog system can includes a sensor system configured to detect physical phenomena and produce corresponding output signals; a memory structure configured to store the output signals as sequential data on a repeating cycle, a watchdog code generator configured to insert a watchdog code into the stored sequential data and update the watchdog code periodically, and a data transmitter configured to receive the sequential data with included watchdog code from the memory structure and transmit the sequential data with the included watchdog code over a physical data channel each cycle of the repeating cycle. An application system receives the data and a watchdog code checker checks whether the watchdog code in the sequential data is correct and produces an error indication when the watchdog code is incorrect.

Abstract: Systems, methods, and circuits provide delay-locked loop (DLL) timing error mitigation. A DLL false-lock detection system can include DLL circuitry configured to receive a reference clock signal having a time period. The system can include shift register circuitry and latched comparison circuitry which can determine a time period of a locked condition of the DLL delay line with respect to the reference clock signal time period. The system can determine whether the system is correctly locked to the base time period or incorrectly locked to a multiple of the base time period. A further system can operate to cause a phase detector circuitry in a DLL to ignore the first edge of a reference clock signal presented to the phase detector circuitry and thereby avoid stuck-lock conditions.

Abstract: Systems, methods, and circuits for electrical pixel background current injection tests for lidar systems are described. Systems, methods, and circuits for electrical pixel timing pulse current injection tests for lidar systems are further described. Systems, methods, and circuits for or pixel photodiode health checking/testing using on-chip bias adjustment and passive photo-current imaging circuitry for lidar systems are also described. Embodiments can be used for specification of an Application Safety Integration Level (ASIL) in compliance with a safety standard such as ISO 26262 or the like.

Abstract: Methods and apparatus for an arrayed time to digital converter (TDC) having matched delay line sampling. In embodiments, a TDC includes a coarse counter circuit to provide an event coarse timing measurement for an event, a coarse counter delivery network to deliver a count value in the coarse counter circuit to a memory storage element circuit, and an array of matched delay lines to provide an event fine timing measurement to the memory storage element circuit. An array of event sample signal generators can generate signals for the event and an array of encoders can encode fine timing measurement information from the memory storage element circuit, where an output of the encoder and the event coarse timing measurement information provide a timestamp for the event. A global delay-locked loop can incorporate a matched delay line coupled to the array of matched delay lines.

Abstract: Methods and apparatus for nonuniformity correction (NUC) for a sensor having an avalanche photodiode (APD) array and an integrated circuit. The sensor can include anode bias control module, a passive mode module, and an active mode module. DC photocurrent from the APD array can be measured and used for controlling an anode reverse bias voltage to each element in the APD to achieve a nonuniformity correction level less than a selected threshold.

Abstract: Methods and apparatus for nonuniformity correction (NUC) for a sensor having an avalanche photodiode (APD) array and an integrated circuit. The sensor can include anode bias control module, a passive mode module, and an active mode module. DC photocurrent from the APD array can be measured and used for controlling an anode reverse bias voltage to each element in the APD to achieve a nonuniformity correction level less than a selected threshold.

Abstract: Methods and apparatus for a detector system having a photodetector and an amplifier to amplify the photodetector signal. A discriminator generates an active output signal when the output from the amplifier is greater than a threshold. An injection circuit is coupled to the input of the amplifier. The injection circuit is configured to selectively inject a test pulse that mimics a pulse from the photodetector for verifying operation of the detector system.

Abstract: Methods and apparatus for an arrayed time to digital converter (TDC) having matched delay line sampling. In embodiments, a TDC includes a coarse counter circuit to provide an event coarse timing measurement for an event, a coarse counter delivery network to deliver a count value in the coarse counter circuit to a memory storage element circuit, and an array of matched delay lines to provide an event fine timing measurement to the memory storage element circuit. An array of event sample signal generators can generate signals for the event and an array of encoders can encode fine timing measurement information from the memory storage element circuit, where an output of the encoder and the event coarse timing measurement information provide a timestamp for the event. A global delay-locked loop can incorporate a matched delay line coupled to the array of matched delay lines.

Abstract: Methods and apparatus for a pixel system for capturing active imaging data. The system includes a photodetector having a first terminal coupled to a voltage supply and a second terminal and a differential transimpedance amplifier having a first input coupled to the second terminal of the photodetector. A voltage discriminator has an input coupled to an output of the differential transimpedance amplifier and an output.

Abstract: Methods and apparatus for a pixel system for providing power supply noise rejection. A photodetector has a first terminal coupled to a voltage supply and a second terminal and a differential transimpedance amplifier has a first input coupled to the second terminal of the photodetector. The differential transimpedance amplifier is configured to convert a singled ended output on the second terminal of the photodetector to a differential signal. A bias circuit is coupled to the differential transimpedance amplifier to bias the differential transimpedance amplifier and the photodetector.

Abstract: Methods and apparatus for a pixel system for correction of non-uniform photo-detector and pixel gains. The system includes a photodetector having a first terminal coupled to a voltage supply and a second terminal, a differential transimpedance amplifier having a first input coupled to the second terminal of the photodetector, and a bias circuit coupled to the differential transimpedance amplifier to set common mode feedback for the differential transimpedance amplifier and to set bias of the photodetector for correcting non-uniform photodetector gain. A digital-to-analog converter is coupled to the bias circuit to output multiple discrete voltage levels.

Abstract: A method and system for matching an unknown facial image of an individual with an image of a celebrity using facial recognition techniques and human perception is disclosed herein. The invention provides a internet hosted system to find, compare, contrast and identify similar characteristics among two or more individuals using a digital camera, cellular telephone camera, wireless device for the purpose of returning information regarding similar faces to the user. The system features classification of unknown facial images from a variety of internet accessible sources, including mobile phones, wireless camera-enabled devices, images obtained from digital cameras or scanners that are uploaded from PCs, third-party applications and databases. Once classified, the matching person's name, image and associated meta-data is sent back to the user. The method and system uses human perception techniques to weight the feature vectors.

Abstract: A system and method for tagging an image of an individual in a plurality of photos is disclosed herein. A feature vector of an individual is used to analyze a set of photos on a social networking website such as Facebook® to determine if an image of the individual is present in a photo of the set of photos. Photos having an image of the individual are tagged preferably by listing a URL or URI for each of the photos in a database.

Abstract: A system and method for tagging an image of an individual in a plurality of photos is disclosed herein. A feature vector of an individual is used to analyze a set of photos on a social networking website such as www.facebook.com to determine if an image of the individual is present in a photo of the set of photos. Photos having an image of the individual are tagged preferably by listing a URL or URI for each of the photos in a database.

Abstract: A system and method for tagging an image of an individual in a plurality of photos is disclosed herein. A feature vector of an individual is used to analyze a set of photos on a social networking website such as www.facebook.com to determine if an image of the individual is present in a photo of the set of photos. Photos having an image of the individual are tagged preferably by listing a URL or URI for each of the photos in a database.

Abstract: A system and method for identifying an image of an individual by touching a screen in a photo is disclosed herein. A feature vector of an individual is used to analyze other photos on a database or social networking website such as FACEBOOK® to determine if an image of the individual is present in a photo of the set of photos. Photos having an image of the individual are tagged preferably by listing a URL or URI for each of the photos in a database.

Abstract: A method and system for of identifying an unknown individual from a digital image is disclosed herein. In one embodiment, the present invention allows an individual to photograph a facial image an unknown individual, transfer that facial image to a server for processing into a feature vector, and then search social networking Web sites to obtain information on the unknown individual. The Web sites comprise myspace.com, facebook.com, linkedin.com, www.hi5.com, www.bebo.com, www.friendster.com, www.igoogle.com, netlog.com, and orkut.com. A method of networking is also disclosed. A method for determining unwanted individuals on a social networking website is also disclosed.

Abstract: A system and method for tagging an image of an individual in a plurality of photos is disclosed herein. A feature vector of an individual is used to analyze a set of photos on a social networking website such as www.facebook.com to determine if an image of the individual is present in a photo of the set of photos. Photos having an image of the individual are tagged preferably by listing a URL or URI for each of the photos in a database.