Abstract: A method of forming a probe pad layout/design, and related device. At least some of the illustrative embodiments are methods comprising testing a semiconductor device by electrically contacting a first portion of a semiconductor die by way of a first pad within a scribe street adjacent to the semiconductor die, and electrically contacting a second portion of the semiconductor die by way of a first bond pad within the semiconductor die.

Abstract: Methods and apparatus to support an overhanging region of stacked die are disclosed. A disclosed method comprises bonding a first die onto a substrate, placing a support element on the substrate; and bonding a second die onto the first die, wherein the second die overhangs at least one edge of the first die and the support element is positioned to limit bending of the second die.

Abstract: In a method and system for testing a presence of a crack (240) in a device under test (DUT) (190), a test system includes a bridge circuit (BC) (120) coupled to an electrical signal source (ESS) (110) capable of generating an electrical signal (102). The BC (120) includes four impedances that are coupled in a bridge structure having two floating nodes (132, 134). The DUT (190) includes a test bond pad (TBP) (192) and an access bond pad (ABP) (194). An impedance measurable across the TBP (192) and the ABP (194) is selectable as one of the four impedances. A stimulus (140) is provided to the DUT (190) to induce stress. A sensor (130) coupled across the two floating nodes (132, 134) detects a change in a value of the electrical signal measured across the two floating nodes (132, 134) in response to the stimulus (140). The change is triggered by the presence of the crack (240) under the TBP (192) caused by the stress, the crack (240) changing the impedance.

Abstract: A system (100) for manufacturing product, in which a first work station (101) is operable to perform a first manufacturing action on the product parts; this first station has a first entrance (101a) and a first exit 101b). A second work station (102) is operable to perform a second manufacturing action on the product parts; this second station has a second entrance (102a) and a second exit (102b). A transport line (103) between the first exit and the second entrance is operable to move the product parts under computer control. A chamber (104) encloses a portion of the line and is constructed so that the transport achieves a balanced throughput from the first station to the second station, while the product parts are exposed to computer-controlled environmental conditions (110) during transport through the chamber. The balanced throughput in the chamber is achieved by waiting lines for the product with computer-controlled monitors (105a) for product parts' positions and times in the chamber.

Abstract: A system (100) for manufacturing product, in which a first work station (101) is operable to perform a first manufacturing action on the product parts; this first station has a first entrance (101a) and a first exit 101b). A second work station (102) is operable to perform a second manufacturing action on the product parts; this second station has a second entrance (102a) and a second exit (102b). A transport line (103) between the first exit and the second entrance is operable to move the product parts under computer control. A chamber (104) encloses a portion of the line and is constructed so that the transport achieves a balanced throughput from the first station to the second station, while the product parts are exposed to computer-controlled environmental conditions (110) during transport through the chamber. The balanced throughput in the chamber is achieved by waiting lines for the product with computer-controlled monitors (105a) for product parts' positions and times in the chamber.

Abstract: A semiconductor assembly comprising an integrated circuit chip with a first plurality of metallic contact pads exposed, having a pitch center-to-center of less than 180 ?m. A metallic bump of reflowable metal is attached to each of these contact pads. The assembly further has an electrically insulating substrate with a second plurality of metallic terminal pads in locations matching the locations of the contact pads. Each of the bumps also attached to these matching terminal pads, respectively, whereby the chip is interconnected with the substrate spaced apart by a gap. An adherent polymeric encapsulant fills the gap so that the encapsulant is free of voids. It is a pivotal feature in the method that vibration energy, up to ultrasonic frequencies, is used while the encapsulant is still in a low-viscosity precursor state in order to ensure the void-free spreading of the precursor throughout the gap between chip and substrate.

Abstract: A semiconductor assembly comprising an integrated circuit chip with a first plurality of metallic contact pads exposed, having a pitch center-to-center of less than 180 &mgr;m. A metallic bump of reflowable metal is attached to each of these contact pads. The assembly further has an electrically insulating substrate with a second plurality of metallic terminal pads in locations matching the locations of the contact pads. Each of the bumps also attached to these matching terminal pads, respectively, whereby the chip is interconnected with the substrate spaced apart by a gap. An adherent polymeric encapsulant fills the gap so that the encapsulant is free of voids.