Patents by Inventor Charles Alvah HILL

Charles Alvah HILL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Face Mask Providing For Scent Releasing Layer
    Publication number: 20240008569
    Abstract: Face masks are described which provide for a scent releasing layer. In certain aspects, cloth face masks are described having a pocket into which a scent releasing layer may be placed. In certain other aspects, disposable facemasks are described which contain a scent releasing layer within the inner and outer layer of the face mask.
    Type: Application
    Filed: November 2, 2021
    Publication date: January 11, 2024
    Inventors: Charles Alvah Hill, Christopher Gust Papas
  • BONDED SEMICONDUCTOR PACKAGE AND RELATED METHODS
    Publication number: 20200350271
    Abstract: Implementations of a semiconductor package may include: a first wafer having a first surface and a first set of blade interconnects, the first set of blade interconnects extending from the first surface. The package may include a second wafer having a first surface and a second set of blade interconnects, the second set of blade interconnects extending from the first surface and oriented substantially perpendicularly to a direction of orientation of the first set of blade interconnects. The first set of blade interconnects may be hybrid bonded to the second set of blade interconnects at a plurality of points of intersection between the first and second set of blade interconnects. The plurality of points of intersection may be located along a length of each blade interconnect of the first set of blade interconnects, and along the length of each blade interconnect of the second set of blade interconnects.
    Type: Application
    Filed: July 15, 2020
    Publication date: November 5, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Thomas Fairfax LONG, Jeffrey Peter GAMBINO, Charles Alvah HILL
  • Bonded semiconductor package and related methods
    Patent number: 10748864
    Abstract: Implementations of a semiconductor package may include: a first wafer having a first surface and a first set of blade interconnects, the first set of blade interconnects extending from the first surface. The package may include a second wafer having a first surface and a second set of blade interconnects, the second set of blade interconnects extending from the first surface and oriented substantially perpendicularly to a direction of orientation of the first set of blade interconnects. The first set of blade interconnects may be hybrid bonded to the second set of blade interconnects at a plurality of points of intersection between the first and second set of blade interconnects. The plurality of points of intersection may be located along a length of each blade interconnect of the first set of blade interconnects, and along the length of each blade interconnect of the second set of blade interconnects.
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: August 18, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Thomas Fairfax Long, Jeffrey Peter Gambino, Charles Alvah Hill
  • BONDED SEMICONDUCTOR PACKAGE AND RELATED METHODS
    Publication number: 20180096988
    Abstract: Implementations of a semiconductor package may include: a first wafer having a first surface and a first set of blade interconnects, the first set of blade interconnects extending from the first surface. The package may include a second wafer having a first surface and a second set of blade interconnects, the second set of blade interconnects extending from the first surface and oriented substantially perpendicularly to a direction of orientation of the first set of blade interconnects. The first set of blade interconnects may be hybrid bonded to the second set of blade interconnects at a plurality of points of intersection between the first and second set of blade interconnects. The plurality of points of intersection may be located along a length of each blade interconnect of the first set of blade interconnects, and along the length of each blade interconnect of the second set of blade interconnects.
    Type: Application
    Filed: October 5, 2016
    Publication date: April 5, 2018
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Thomas Fairfax LONG, Jeffrey Peter GAMBINO, Charles Alvah HILL