Patents by Inventor Charles Brian Hall

Charles Brian Hall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8799590
    Abstract: A system enabling Transactional Memory with overflow prediction mechanism, comprising: prediction unit for predicting the mode for the next execution of a transaction based on the final status of the previous execution of the transaction; execution unit for executing the transaction in the execution mode predicted by the prediction unit, wherein the execution mode comprises overflow mode and non-overflow made. According to this invention, before a transaction is executed, it is predicted whether or not the transaction will overflow, and therefore, the execution of the transaction which is necessary to determine whether or not an overflow will occur is saved.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: August 5, 2014
    Assignee: International Business Machines Corporation
    Inventors: Hua Yong Wang, Charles Brian Hall, Yan Qi Wang, Zhi Yong Liang, Xiao Wei Shen
  • Publication number: 20090292884
    Abstract: This invention provides a system enabling Transactional Memory with overflow prediction mechanism, comprising: prediction unit for predicting the mode for the next execution of a transaction based on the final status of the previous execution of the transaction; execution unit for executing the transaction in the execution mode predicted by the prediction unit, wherein the execution mode comprises overflow mode and non-overflow made. According to this invention, before a transaction is executed, it is predicted whether or not the transaction will overflow, and therefore, the execution of the transaction which is necessary to determine whether or not an overflow will occur is saved and the system performance can be improved.
    Type: Application
    Filed: May 8, 2009
    Publication date: November 26, 2009
    Applicant: International Business Machines Corporation
    Inventors: Hua Yong Wang, Charles Brian Hall, Yan Qi Wang, Zhi Yong Liang, Xiao Wei Shen
  • Patent number: 7340733
    Abstract: An embodiment of the present invention provides an optimizer for optimizing source code to generate optimized source code having instructions for instructing a central processing unit (CPU) to iteratively compute values for a primary recurrence element. A computer programmed loop for computing the primary recurrence element and subsequent recurrence elements is an example of a case involving iteratively computing the primary recurrence element. The CPU is operatively coupled to fast operating memory (FOM) and operatively coupled to slow operating memory (SOM). SOM stores the generated optimized source code. The optimized source code includes instructions for instructing said CPU to store a computed value of the primary recurrence element in a storage location of FOM. The instructions also includes instructions to consign the computed value of the primary recurrence element from the storage location to another storage location of the FOM.
    Type: Grant
    Filed: December 5, 2002
    Date of Patent: March 4, 2008
    Assignee: International Business Machines Corporation
    Inventors: Roch Georges Archambault, Robert James Blainey, Charles Brian Hall, Yingwei Zhang
  • Publication number: 20080040560
    Abstract: A method, system and computer program product for generating a read-only lock implementation from a read-only lock portion of program code. In response to determining that a lock portion of the program code is a read-only lock, a read-only lock implementation is generated to protect at least one piece of shared data. The read-only lock implementation comprises a plurality of instructions with dependencies created between the instructions to ensure that a lock corresponding to the data is determined to be free before permitting access to that data. In one embodiment, when executed, the read-only lock implementation loads a lock word from a memory address into a register and places a reserve on the memory address. The lock word is evaluated to determine if the lock is free, and, in response to determining that the lock is tree, at least one piece of shared data protected by the lock is accessed. A value is conditionally stored back to the memory address if the reserve is present.
    Type: Application
    Filed: March 15, 2007
    Publication date: February 14, 2008
    Inventors: Charles Brian Hall, Zhong Liang Wang
  • Publication number: 20030115579
    Abstract: An embodiment of the present invention provides an optimizer for optimizing source code to generate optimized source code having instructions for instructing a central processing unit (CPU) to iteratively compute values for a primary recurrence element. A computer programmed loop for computing the primary recurrence element and subsequent recurrence elements is an example of a case involving iteratively computing the primary recurrence element. The CPU is operatively coupled to fast operating memory (FOM) and operatively coupled to slow operating memory (SOM). SOM stores the generated optimized source code. The optimized source code includes instructions for instructing said CPU to store a computed value of the primary recurrence element in a storage location of FOM. The instructions also includes instructions to consign the computed value of the primary recurrence element from the storage location to another storage location of the FOM.
    Type: Application
    Filed: December 5, 2002
    Publication date: June 19, 2003
    Applicant: International Business Machines Corporation
    Inventors: Roch Georges Archambault, Robert James Blainey, Charles Brian Hall, Yingwei Zhang