Patents by Inventor Charles Caër
Charles Caër has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230378720Abstract: According to an aspect of the present inventive concept there is provided a light emitting unit, for emitting laser light at a laser wavelength, arranged on a planar surface of a substrate. The unit comprises a first reflective element to reflect light at the laser wavelength, a gain element to amplify the light, and a second reflective element to partially reflect the light, and to emit the laser light. The elements form a stack of layers integrated onto the planar surface. Each layer is parallel with the planar surface, and the gain element is arranged between the first and second reflective elements. The unit comprises a beam shaping element integrated with the stack. The beam shaping element is configured to shape the emitted laser light. The beam shaping element comprises a plurality of structures spaced apart in a direction of an extension of a layer of the beam shaping element. A size of the structures and/or a distance between adjacent structures is smaller than the laser wavelength.Type: ApplicationFiled: May 16, 2023Publication date: November 23, 2023Inventors: Philippe SOUSSAN, Charles CAER, Xavier ROTTENBERG
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Patent number: 11619785Abstract: An optical device including a waveguide grating is disclosed. The optical device may be used as an optical cavity for a laser device, for instance, of an integrated laser device for light detection and ranging (Lidar) applications. In one aspect, the optical device includes a waveguide grating for guiding light, a heating layer provided beneath or above the waveguide grating, and two or more contacts for passing a current through the heating layer, to generate heat in the heating layer. The heating layer is thermally coupled to the waveguide grating and is optically decoupled from the waveguide grating.Type: GrantFiled: August 17, 2021Date of Patent: April 4, 2023Assignee: IMEC vzwInventors: Charles Caer, Sarvagya Paavan Dwivedi
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Patent number: 11372269Abstract: A silicon photonic device is provided including a substrate; a passive silicon optical device, on the substrate; an electrically insulating cladding layer that encapsulates the optical device on the substrate, the cladding layer including a trench patterned therein, so as for the trench to at least partly cover the optical device, on a side of the latter, the trench filled with an electrically insulating, thermally conducting material, having a refractive index that is lower than a refractive index of silicon, thereby forming a heat conduction channel toward the optical device; and a heating element, in contact with the thermally conducting material. A method of operating such silicon photonic devices is also provided.Type: GrantFiled: August 17, 2018Date of Patent: June 28, 2022Assignee: International Business Machines CorporationInventors: Charles Caër, Gustavo Ferreira Villares
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Publication number: 20220057581Abstract: An optical device including a waveguide grating is disclosed. The optical device may be used as an optical cavity for a laser device, for instance, of an integrated laser device for light detection and ranging (Lidar) applications. In one aspect, the optical device includes a waveguide grating for guiding light, a heating layer provided beneath or above the waveguide grating, and two or more contacts for passing a current through the heating layer, to generate heat in the heating layer. The heating layer is thermally coupled to the waveguide grating and is optically decoupled from the waveguide grating.Type: ApplicationFiled: August 17, 2021Publication date: February 24, 2022Inventors: Charles Caer, Sarvagya Paavan DWIVEDI
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Publication number: 20210384700Abstract: The disclosure relates to a method for processing a laser device, for example a III-V on silicon laser, including: providing a carrier substrate; forming a grating structure on the carrier substrate, wherein the grating structure delimits a cavity on a surface of the carrier substrate; placing a die in the cavity and bonding the die to the carrier substrate, wherein the die comprises an active region including a III-V semiconductor material; transferring the die from the carrier substrate to a silicon substrate by bonding an exposed side of the die to the silicon substrate and subsequently debonding the carrier substrate from the die; and forming a photonic structure, for example a silicon waveguide, coupled to the die.Type: ApplicationFiled: June 7, 2021Publication date: December 9, 2021Inventors: Charles Caer, Philippe Soussan, Deniz Sabuncuoglu Tezcan, Gauri Karve, Yunlong Li
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Patent number: 11075307Abstract: Embodiments of the invention are directed to a method of fabrication of an electro-optical device. A non-limiting example of the method relies on a waveguide. A trench is opened in the waveguide and a stack of optically active semiconductor materials is directly grown from a bottom wall of the trench and are stacked along a stacking direction that is perpendicular to a main plane of the waveguide. The stack is partly encapsulated in the waveguide, whereby a bottom layer of the stack is in direct contact with a waveguide core material, whereas upper portions of opposite, lateral sides of the stack are exposed. An insulating layer of material is deposited to cover exposed surfaces of the waveguide and structured to form a lateral growth template. Contact layers are laterally grown due to the lateral growth template formed. The contact layers can include an n-doped and p-doped contact layers.Type: GrantFiled: July 18, 2019Date of Patent: July 27, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Charles Caër, Yannick Baumgartner, Lukas Czornomaz
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Patent number: 11070029Abstract: Embodiments are directed to the fabrication of an electro-optical device. The device comprises the forming of an active region with a stack of III-V semiconductor gain materials stacked along a stacking direction z. The active region may be formed as a slab having several lateral surface portions, each extending parallel to the stacking direction z. The device further comprises selectively re-growing two paired elements, which include: a pair of doped layers of III-V semiconductor materials (an n-doped layer and a p-doped layer); and a pair of lateral waveguide cores. The two paired elements may be laterally arranged, two-by-two, on opposite sides of the slab. The elements distinctly adjoin respective ones of the lateral surface portions of the slab, so as for these elements to be separated from each other by the slab. The disclosure may be further directed to related silicon photonics devices.Type: GrantFiled: April 26, 2019Date of Patent: July 20, 2021Assignee: International Business Machines CorporationInventors: Charles Caer, Lukas Czornomaz, Stefan Abel, Bert Jan Offrein
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Publication number: 20210020796Abstract: Embodiments of the invention are directed to a method of fabrication of an electro-optical device. A non-limiting example of the method relies on a waveguide. A trench is opened in the waveguide and a stack of optically active semiconductor materials is directly grown from a bottom wall of the trench and are stacked along a stacking direction that is perpendicular to a main plane of the waveguide. The stack is partly encapsulated in the waveguide, whereby a bottom layer of the stack is in direct contact with a waveguide core material, whereas upper portions of opposite, lateral sides of the stack are exposed. An insulating layer of material is deposited to cover exposed surfaces of the waveguide and structured to form a lateral growth template. Contact layers are laterally grown due to the lateral growth template formed. The contact layers can include an n-doped and p-doped contact layers.Type: ApplicationFiled: July 18, 2019Publication date: January 21, 2021Inventors: Charles Caër, Yannick Baumgartner, Lukas Czornomaz
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Patent number: 10897121Abstract: A silicon photonic chip includes a silicon on insulator wafer and an electro-optical device on the silicon on insulator wafer. The electro-optical device is a lateral current injection electro-optical device that includes a slab having a pair of structured doped layers of III-V semiconductor materials arranged side-by-side in the slab, the pair of structured doped layers includes an n-doped layer and a p-doped layer, each of the p-doped layer and the n-doped layer is configured as a two-dimensional photonic crystal. A separation section extends between the pair of structured doped layers, the separation section fully separates the p-doped layer from the n-doped layer. The separation section includes current blocking trenches, and an active region of III-V semiconductor gain materials between the current blocking trenches that form a photonic crystal cavity.Type: GrantFiled: September 16, 2019Date of Patent: January 19, 2021Assignee: International Business Machines CorporationInventors: Charles Caér, Lukas Czornomaz
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Patent number: 10763644Abstract: A lateral current injection electro-optical device includes a slab having a pair of structured, doped layers of III-V semiconductor materials arranged side-by-side in the slab, the pair including an n-doped layer and a p-doped layer, each of the p-doped layer and the n-doped layer includes a two-dimensional photonic crystal, and a separation section extending between the pair of structured layers, the separation section separates the pair of structured layers, the separation section includes current blocking trenches, and an active region of III-V semiconductor gain materials between the current blocking trenches that form a photonic crystal cavity.Type: GrantFiled: September 16, 2019Date of Patent: September 1, 2020Assignee: International Business Machines CorporationInventors: Charles Caër, Lukas Czornomaz
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Patent number: 10734787Abstract: Embodiments of the disclosure are directed to a lateral current injection electro-optical device. The device comprises an active region with a stack of III-V semiconductor gain materials stacked along a stacking direction z. The active region may be formed as a slab having several lateral surface portions, each extending parallel to the stacking direction z. The device further comprises two paired elements, which include: a pair of doped layers of III-V semiconductor materials (an n-doped layer and a p-doped layer); and a pair of lateral waveguide cores. The two paired elements may be laterally arranged, two-by-two, on opposite sides of the slab. The elements distinctly adjoin respective ones of the lateral surface portions of the slab, so as for these elements to be separated from each other by the slab. The disclosure may be further directed to related silicon photonics devices and fabrication methods.Type: GrantFiled: April 26, 2019Date of Patent: August 4, 2020Assignee: International Business Machines CorporationInventors: Charles Caër, Lukas Czornomaz, Stefan Abel, Bert Jan Offrein
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Patent number: 10700496Abstract: A device may include a substrate and an active region. This active region may include a stack of semiconductor gain materials stacked along a stacking direction. The latter may extend substantially perpendicular to a plane of the substrate. The active region may be furthermore tapered so as to widen toward the substrate. In addition, the device may include a pair of doped layers semiconductor materials, the pair may include an n-doped layer and a p-doped layer arranged on the substrate and on opposite. The doped layers may be arranged on the substrate and on opposite, lateral sides of the tapered active region, respectively. The device may include an electron blocking layer, which may extend both at a first interface, between a p-doped layer and the substrate, and at a second interface, between the tapered active region and the p-doped layer, along a lateral side of the tapered active region.Type: GrantFiled: June 3, 2019Date of Patent: June 30, 2020Assignee: International Business Machines CorporationInventors: Herwig Hahn, Charles Caër
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Patent number: 10594111Abstract: A lateral current injection electro-optical device includes a slab having a pair of structured, doped layers of III-V semiconductor materials arranged side-by-side in the slab, the pair including an n-doped layer and a p-doped layer, each of the p-doped layer and the n-doped layer includes a two-dimensional photonic crystal, and a separation section extending between the pair of structured layers, the separation section separates the pair of structured layers, the separation section includes current blocking trenches, and an active region of III-V semiconductor gain materials between the current blocking trenches that form a photonic crystal cavity.Type: GrantFiled: August 31, 2017Date of Patent: March 17, 2020Assignee: International Business Machines CorporationInventors: Charles Caër, Lukas Czornomaz
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Publication number: 20200083673Abstract: A silicon photonic chip includes a silicon on insulator wafer and an electro-optical device on the silicon on insulator wafer. The electro-optical device is a lateral current injection electro-optical device that includes a slab having a pair of structured doped layers of III-V semiconductor materials arranged side-by-side in the slab, the pair of structured doped layers includes an n-doped layer and a p-doped layer, each of the p-doped layer and the n-doped layer is configured as a two-dimensional photonic crystal. A separation section extends between the pair of structured doped layers, the separation section fully separates the p-doped layer from the n-doped layer. The separation section includes current blocking trenches, and an active region of III-V semiconductor gain materials between the current blocking trenches that form a photonic crystal cavity.Type: ApplicationFiled: September 16, 2019Publication date: March 12, 2020Inventors: Charles Caër, Lukas Czornomaz
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Publication number: 20200083672Abstract: A lateral current injection electro-optical device includes a slab having a pair of structured, doped layers of III-V semiconductor materials arranged side-by-side in the slab, the pair including an n-doped layer and a p-doped layer, each of the p-doped layer and the n-doped layer includes a two-dimensional photonic crystal, and a separation section extending between the pair of structured layers, the separation section separates the pair of structured layers, the separation section includes current blocking trenches, and an active region of III-V semiconductor gain materials between the current blocking trenches that form a photonic crystal cavity.Type: ApplicationFiled: September 16, 2019Publication date: March 12, 2020Inventors: Charles Caër, Lukas Czornomaz
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Publication number: 20200057319Abstract: A silicon photonic device is provided including a substrate; a passive silicon optical device, on the substrate; an electrically insulating cladding layer that encapsulates the optical device on the substrate, the cladding layer including a trench patterned therein, so as for the trench to at least partly cover the optical device, on a side of the latter, the trench filled with an electrically insulating, thermally conducting material, having a refractive index that is lower than a refractive index of silicon, thereby forming a heat conduction channel toward the optical device; and a heating element, in contact with the thermally conducting material. A method of operating such silicon photonic devices is also provided.Type: ApplicationFiled: August 17, 2018Publication date: February 20, 2020Inventors: Charles Caër, Gustavo Ferreira Villares
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Publication number: 20190288486Abstract: A device may include a substrate and an active region. This active region may include a stack of semiconductor gain materials stacked along a stacking direction. The latter may extend substantially perpendicular to a plane of the substrate. The active region may be furthermore tapered so as to widen toward the substrate. In addition, the device may include a pair of doped layers semiconductor materials, the pair may include an n-doped layer and a p-doped layer arranged on the substrate and on opposite. The doped layers may be arranged on the substrate and on opposite, lateral sides of the tapered active region, respectively. The device may include an electron blocking layer, which may extend both at a first interface, between a p-doped layer and the substrate, and at a second interface, between the tapered active region and the p-doped layer, along a lateral side of the tapered active region.Type: ApplicationFiled: June 3, 2019Publication date: September 19, 2019Inventors: Herwig Hahn, Charles Caër
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Publication number: 20190252860Abstract: Embodiments of the disclosure are directed to the fabrication of an electro-optical device. The device comprises the forming of an active region with a stack of III-V semiconductor gain materials stacked along a stacking direction z. The active region may be formed as a slab having several lateral surface portions, each extending parallel to the stacking direction z. The device further comprises selectively re-growing two paired elements, which include: a pair of doped layers of III-V semiconductor materials (an n-doped layer and a p-doped layer); and a pair of lateral waveguide cores. The two paired elements may be laterally arranged, two-by-two, on opposite sides of the slab. The elements distinctly adjoin respective ones of the lateral surface portions of the slab, so as for these elements to be separated from each other by the slab. The disclosure may be further directed to related silicon photonics devices.Type: ApplicationFiled: April 26, 2019Publication date: August 15, 2019Inventors: Charles Caer, Lukas Czornomaz, Stefan Abel, Bert Jan Offrein
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Publication number: 20190252859Abstract: Embodiments of the disclosure are directed to a lateral current injection electro-optical device. The device comprises an active region with a stack of III-V semiconductor gain materials stacked along a stacking direction z. The active region may be formed as a slab having several lateral surface portions, each extending parallel to the stacking direction z. The device further comprises two paired elements, which include: a pair of doped layers of III-V semiconductor materials (an n-doped layer and a p-doped layer); and a pair of lateral waveguide cores. The two paired elements may be laterally arranged, two-by-two, on opposite sides of the slab. The elements distinctly adjoin respective ones of the lateral surface portions of the slab, so as for these elements to be separated from each other by the slab. The disclosure may be further directed to related silicon photonics devices and fabrication methods.Type: ApplicationFiled: April 26, 2019Publication date: August 15, 2019Inventors: Charles Caër, Lukas Czornomaz, Stefan Abel, Bert Jan Offrein
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Patent number: 10355453Abstract: A device may include a substrate and an active region. This active region may include a stack of semiconductor gain materials stacked along a stacking direction. The latter may extend substantially perpendicular to a plane of the substrate. The active region may be furthermore tapered so as to widen toward the substrate. In addition, the device may include a pair of doped layers semiconductor materials, the pair may include an n-doped layer and a p-doped layer arranged on the substrate and on opposite. The doped layers may be arranged on the substrate and on opposite, lateral sides of the tapered active region, respectively. The device may include an electron blocking layer, which may extend both at a first interface, between a p-doped layer and the substrate, and at a second interface, between the tapered active region and the p-doped layer, along a lateral side of the tapered active region.Type: GrantFiled: November 8, 2017Date of Patent: July 16, 2019Assignee: International Business Machines CorporationInventors: Herwig Hahn, Charles Caër