Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may receive an otw signal that is associated with low-path pass information and transmission data. The apparatus may apply a cost function and an update function to the otw signal prior to sending the otw signal to an oscillator. The apparatus may determine a correction factor for use in estimating a gain of the oscillator based at least in part on an output of the update function.

Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may receive an otw signal that is associated with low-path pass information and transmission data. The apparatus may apply a cost function and an update function to the otw signal prior to sending the otw signal to an oscillator. The apparatus may determine a correction factor for use in estimating a gain of the oscillator based at least in part on an output of the update function.

Abstract: The various embodiments include methods and systems for facilitating the configuration of smart objects within a wireless communication system by leveraging the microphonic effect to enable a user to identify each smart object to a control device. By configuring the control device to monitor wireless signals from a plurality of smart objects for small modulations due to the microphonic effect from a user tap on a particular smart object, the control device may recognize a particular smart device to be configured. By coordinating the monitoring for small modulations in received signals with a user interface for registering smart objects, various embodiments provide a simple mechanism by which users can correlate smart objects to corresponding icons or object names in a control interface. The various embodiments enable a user to complete the onboarding a smart objects with a control device without requiring the need to enter information into a user interface.

Abstract: Aspects of the present disclosure are generally directed to techniques and apparatus for estimating a gain of a VCO in a PLL. In certain aspects, the technique includes calculating a C-V characteristic of a varactor matched to another varactor in the VCO. The technique also includes estimating the gain of the VCO based on the C-V characteristic of the varactor, a tank inductance of the VCO, and an output frequency of the VCO. Aspects of the present disclosure allow for estimating the gain of the VCO while the PLL remains in operation.

Abstract: Estimating a gain of a VCO in a PLL, including: means for matching to a varactor in the VCO; and means for estimating the gain of the VCO by calculating a C-V characteristic of the means for matching along with tank inductance and an output frequency of the VCO, wherein estimating the gain of the VCO by calculating the C-V characteristic of the means for matching allows the PLL to remain in operation during estimation.

Abstract: Techniques for an analog-to-digital converter (ADC) using pipeline architecture includes a linearization technique for a spurious-free dynamic range (SFDR) over 80 deciBels. In some embodiments, sampling rates exceed a megahertz. According to a second approach, a switched-capacitor circuit is configured for correct operation in a high radiation environment. In one embodiment, the combination yields high fidelity ADC (>88 deciBel SFDR) while sampling at 5 megahertz sampling rates and consuming <60 milliWatts. Furthermore, even though it is manufactured in a commercial 0.25-?m CMOS technology (1 ?m=12?6 meters), it maintains this performance in harsh radiation environments. Specifically, the stated performance is sustained through a highest tested 2 megarad(Si) total dose, and the ADC displays no latchup up to a highest tested linear energy transfer of 63 million electron Volts square centimeters per milligram at elevated temperature (131 degrees C.) and supply (2.7 Volts, versus 2.5 Volts nominal).

Abstract: Techniques for an analog-to-digital converter (ADC) using pipeline architecture includes a linearization technique for a spurious-free dynamic range (SFDR) over 80 deciBels. In some embodiments, sampling rates exceed a megahertz. According to a second approach, a switched-capacitor circuit is configured for correct operation in a high radiation environment. In one embodiment, the combination yields high fidelity ADC (>88 deciBel SFDR) while sampling at 5 megahertz sampling rates and consuming <60 milliWatts. Furthermore, even though it is manufactured in a commercial 0.25-?m CMOS technology (1 ?m=12?6 meters), it maintains this performance in harsh radiation environments. Specifically, the stated performance is sustained through a highest tested 2 megarad(Si) total dose, and the ADC displays no latchup up to a highest tested linear energy transfer of 63 million electron Volts square centimeters per milligram at elevated temperature (131 degrees C.) and supply (2.7 Volts, versus 2.5 Volts nominal).