Abstract: An active matrix display includes an annealed flexible dielectric substrate, a thin-film-transistor (TFT), a pixel electrode, and an interconnect. The annealed substrate includes at least a first surface and a second surface. The TFT is formed on the annealed flexible dielectric substrate first surface. The pixel electrode is formed on the annealed flexible dielectric substrate first surface. The interconnect is formed on the annealed flexible dielectric substrate, and includes a conductor having an interconnect contact and a pixel electrode contact formed thereon. The interconnect contact is electrically coupled to the TFT, and the pixel contact is electrically coupled to the pixel electrode.

Abstract: An active matrix display backplane is formed by annealing a flexible dielectric substrate, and then forming one or more thin-film-transistors (TFTs), one or more pixel electrodes, and an interconnect on a surface of the annealed substrate. The interconnect includes individual, spaced apart electrodes that are electrically coupled to one another. One of the interconnect electrodes is electrically coupled to a TFT, and the other interconnect electrode is electrically coupled to the pixel electrode, to thereby electrically interconnect the TFT and the pixel electrode.

Abstract: An active matrix display backplane is formed by annealing a flexible dielectric substrate, and then forming one or more thin-film-transistors (TFTs), one or more pixel electrodes, and an interconnect on a surface of the annealed substrate. The interconnect includes individual, spaced apart electrodes that are electrically coupled to one another. One of the interconnect electrodes is electrically coupled to a TFT, and the other interconnect electrode is electrically coupled to the pixel electrode, to thereby electrically interconnect the TFT and the pixel electrode.

Abstract: An active matrix display backplane is formed by annealing a flexible dielectric substrate, and then forming one or more thin-film-transistors (TFTs), one or more pixel electrodes, and an interconnect on a surface of the annealed substrate. The interconnect includes individual, spaced apart electrodes that are electrically coupled to one another. One of the interconnect electrodes is electrically coupled to a TFT, and the other interconnect electrode is electrically coupled to the pixel electrode, to thereby electrically interconnect the TFT and the pixel electrode.