Abstract: Provided is an eyewear lens, including a lens substrate and an optical interference coating. The lens substrate is comprised of an optical material, and the optical interference coating is combined with the lens substrate and is stacked by the composition of high and low reflectivity materials. A predefined reflective appearance color will be formed by light getting through the optical interference coating. The lens substrate contains another filter on one side surface or both side surfaces or inside the lens substrate which is complementary to the light after penetrating the optical interference coating such that the overall transmittance light color remains neutral balance. Moreover, the overall transmittance spectrum of a lens uniformly filters the reflected visible light of objects. As such, a stylish reflective appearance color lens having neutral balance perspective visual tone and most colorful rendering effect of watching the scenery is achieved.

Abstract: Provided is an eyewear lens, including a lens substrate and an optical interference coating; the lens substrate is comprised of an optical material, and the optical interference coating is bonded to the lens substrate and is stacked by the composition of high and low reflectivity materials. A predefined reflective appearance color will be formed by light getting through the optical interference coating. The lens substrate contains another filter on one side surface or both side surfaces or inside the lens substrate which is complementary to the light after penetrating the optical interference coating such that the overall transmittance light tone remain neutral balance. The overall transmittance light spectrum has three pass-bands corresponding to the maximum response of the human eye cone cells, and the relatively high transmittance values of each pass-band center are approximately at 450 nm, 530 nm and 610 nm. The FWHM of each pass-band is between 3 nm and 50 nm.

Abstract: Provided is an eyewear lens, including a lens substrate and an optical interference coating; the lens substrate is comprised of an optical material, and the optical interference coating is bonded to the lens substrate and is stacked by the composition of high and low reflectivity materials. A predefined reflective appearance color will be formed by light getting through the optical interference coating. The lens substrate contains another filter on one side surface or both side surfaces or inside the lens substrate which is complementary to the light after penetrating the optical interference coating such that the overall transmittance light tone remain neutral balance. The overall transmittance light spectrum has three pass-bands corresponding to the maximum response of the human eye cone cells, and the relatively high transmittance values of each pass-band center are approximately at 450 nm, 530 nm and 610 nm. The FWHM of each pass-band is between 3 nm and 50 nm.

Abstract: Provided is an eyewear lens, including a lens substrate and an optical interference coating. The lens substrate is comprised of an optical material, and the optical interference coating is combined with the lens substrate and is stacked by the composition of high and low reflectivity materials. A predefined reflective appearance color will be formed by light getting through the optical interference coating. The lens substrate contains another filter on one side surface or both side surfaces or inside the lens substrate which is complementary to the light after penetrating the optical interference coating such that the overall transmittance light color remains neutral balance. Moreover, the overall transmittance spectrum of a lens uniformly filters the reflected visible light of objects. As such, a stylish reflective appearance color lens having neutral balance perspective visual tone and most colorful rendering effect of watching the scenery is achieved.

Abstract: Methods and systems are described herein for determining if bit cell read or write rates require a refresh of the accessed or neighboring bit cells. The refresh of VLT memory bit cells that undergo a high frequency of page address read operations and write operations helps to maintain integrity of data stored in the VLT memory bit cells. The methods and systems determine, during each RAS cycle, if a rate of Page Address read operations or write operations exceeds a maximum rate across an interval, and conditionally cause a refresh operation if the rate exceeds the maximum rate. The methods and systems output a write back signal to cause a refresh of the associated VLT memory bit cells to prevent corruption of data stored in the associated VLT memory bit cells.

Abstract: Methods and systems are described herein for determining if bit cell read or write rates require a refresh of the accessed or neighboring bit cells. The refresh of VLT memory bit cells that undergo a high frequency of page address read operations and write operations helps to maintain integrity of data stored in the VLT memory bit cells. The methods and systems determine, during each RAS cycle, if a rate of Page Address read operations or write operations exceeds a maximum rate across an interval, and conditionally cause a refresh operation if the rate exceeds the maximum rate. The methods and systems output a write back signal to cause a refresh of the associated VLT memory bit cells to prevent corruption of data stored in the associated VLT memory bit cells.

Abstract: A memory controller, system, and methods are disclosed. The system comprises a memory controller interconnected to a plurality of memory chips. Each memory chip stores data at a plurality of locations. The memory controller performs a sparing transaction comprising reading data from a given location of one or more of the memory chips including a first memory chip, writing the data to a given location of one or more of the memory chips including a second memory chip, wherein during writing, data from the first memory chip is written to the second memory chip, and allowing additional memory transactions directed to the memory chips between the start of reading and the end of writing unless the additional memory transaction is targeted to the given location. In a further embodiment, the sparing transaction comprises correcting errors in the data before writing the data.

Abstract: An electrical power strip includes a housing, an AC power source (e.g. a male plug or power cord), an AC outlet, a converter, and a 12 VDC outlet. The AC outlet and the converter receive power from the AC power source. The converter converts the AC power (e.g. 120 VAC) to 12 VDC and supplies the converted power to the 12 VDC outlet, which may be a cigarette lighter outlet. The housing exterior defines a cradle to receive a 12 VDC device. A handle is also included on the power strip.

Abstract: A memory controller, system, and methods are disclosed. The system comprises a memory controller interconnected to a plurality of memory chips. Each memory chip stores data at a plurality of locations. The memory controller performs a sparing transaction comprising reading data from a given location of one or more of the memory chips including a first memory chip, writing the data to a given location of one or more of the memory chips including a second memory chip, wherein during writing, data from the first memory chip is written to the second memory chip, and allowing additional memory transactions directed to the memory chips between the start of reading and the end of writing unless the additional memory transaction is targeted to the given location. In a further embodiment, the sparing transaction comprises correcting errors in the data before writing the data.

Abstract: An electrical power strip includes a housing, an AC power source (e.g. a male plug or power cord), an AC outlet, a converter, and a 12 VDC outlet. The AC outlet and the converter receive power from the AC power source. The converter converts the AC power (e.g. 120 VAC) to 12 VDC and supplies the converted power to the 12 VDC outlet, which may be a cigarette lighter outlet. The housing exterior defines a cradle to receive a 12 VDC device. A handle is also included on the power strip.

Abstract: A method provides for real-time asset location tracking. An asset in a wide area network, be it a utilities network or a communication network, registers itself with a network management center. The registration process includes identification of a physical location of the asset usable for mapping and tracking the asset.

Abstract: A device for filtering pigment particles from used vaporized paint sprayed from a spray gun, includes a hood member which is mounted on a supporter and which confines an operating space with an inlet for entrance of the used vaporized paint. A tubular coupling member is connected to the hood member, and has a duct communicated with the inlet. A filtering member is disposed in the duct and downstream of the inlet. A motor-driven impeller is disposed upstream of an outlet of the duct and forces the filtered vaporized paint through the filtering member out of the outlet.

Abstract: In a fluorescence polarization assay for determining the amount of a target analyte in a test sample, wherein the amount of analyte is related to the amount of fluorescence emitted from the analyte-containing reagent medium, the improvement comprising contacting the analyte-containing reagent medium with of at least one compound from the group consisting of 1,10-phenanthroline, 8-hydroxy-7-iodo-5-quinoline, naphthalene-1-sulfonic acid, salts thereof, and any combination thereof.